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authorV Sowmya <v.sowmya@intel.com>2021-03-24 21:24:47 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-03-26 06:27:10 +0000
commita889e2a33723478fc2ca460acaad04ba771828fa (patch)
treee91a5cfabe21a6c3aae3b81044de4be2af766632 /src
parent5504cdb51150b8bc86f4ac0cece6fd746fc7510b (diff)
downloadcoreboot-a889e2a33723478fc2ca460acaad04ba771828fa.tar.xz
mb/intel/shadowmountain: Disable the unused CPU PCIe RP
This patch disables the unsued CPU PCIe RP for shadowmountain. TEST= Boot shadowmountain and verify the device is disabled. Signed-off-by: V Sowmya <v.sowmya@intel.com> Change-Id: Ide2badb06178fca8ff5cf51d8573a14635e190cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/51772 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
index 4df80179b1..98f64008a5 100644
--- a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
+++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb
@@ -188,7 +188,7 @@ chip soc/intel/alderlake
device pci 02.0 on end # Graphics
device pci 04.0 on end # DPTF
device pci 05.0 on end # IPU
- device pci 06.0 on end # PEG60
+ device pci 06.0 off end # PEG60
device pci 07.0 on end # TBT_PCIe0
device pci 07.1 on end # TBT_PCIe1
device pci 07.2 on end # TBT_PCIe2