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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-04 08:25:27 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2019-03-06 11:44:06 +0000 |
commit | ad7758ca521bab7f1aaa0977516002f905cc0a67 (patch) | |
tree | 731dfd804d94ac33ac5be833c22dd1454af3b8cd /src | |
parent | 6fefdfd106baff0cc74551e14d6344408271524a (diff) | |
download | coreboot-ad7758ca521bab7f1aaa0977516002f905cc0a67.tar.xz |
device/pci_ops: Change ramstage PCI accessor signatures
This reduces parameter passing and visibility of
parsing struct *dev to PCI bus:dev.fn.
Change-Id: Ie4232ca1db9cffdf21ed133143acfb7517577736
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31750
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/x86/pci_ops_conf1.c | 32 | ||||
-rw-r--r-- | src/device/pci_ops.c | 18 | ||||
-rw-r--r-- | src/device/pci_ops_mmconf.c | 32 | ||||
-rw-r--r-- | src/include/device/pci.h | 12 |
4 files changed, 44 insertions, 50 deletions
diff --git a/src/arch/x86/pci_ops_conf1.c b/src/arch/x86/pci_ops_conf1.c index 1180a82b0b..b1dadc3e23 100644 --- a/src/arch/x86/pci_ops_conf1.c +++ b/src/arch/x86/pci_ops_conf1.c @@ -19,50 +19,50 @@ */ #if !IS_ENABLED(CONFIG_PCI_IO_CFG_EXT) -#define CONF_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \ - (devfn << 8) | (where & ~3)) +#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \ + ((dev)->path.pci.devfn << 8) | (where & ~3)) #else -#define CONF_CMD(bus, devfn, where) (0x80000000 | (bus << 16) | \ - (devfn << 8) | ((where & 0xff) & ~3) |\ +#define CONF_CMD(dev, where) (0x80000000 | ((dev)->bus->secondary << 16) | \ + ((dev)->path.pci.devfn << 8) | ((where & 0xff) & ~3) |\ ((where & 0xf00)<<16)) #endif -static uint8_t pci_conf1_read_config8(int bus, int devfn, int where) +static uint8_t pci_conf1_read_config8(struct device *dev, int where) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); return inb(0xCFC + (where & 3)); } -static uint16_t pci_conf1_read_config16(int bus, int devfn, int where) +static uint16_t pci_conf1_read_config16(struct device *dev, int where) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); return inw(0xCFC + (where & 2)); } -static uint32_t pci_conf1_read_config32(int bus, int devfn, int where) +static uint32_t pci_conf1_read_config32(struct device *dev, int where) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); return inl(0xCFC); } -static void pci_conf1_write_config8(int bus, int devfn, int where, +static void pci_conf1_write_config8(struct device *dev, int where, uint8_t value) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); outb(value, 0xCFC + (where & 3)); } -static void pci_conf1_write_config16(int bus, int devfn, int where, +static void pci_conf1_write_config16(struct device *dev, int where, uint16_t value) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); outw(value, 0xCFC + (where & 2)); } -static void pci_conf1_write_config32(int bus, int devfn, int where, +static void pci_conf1_write_config32(struct device *dev, int where, uint32_t value) { - outl(CONF_CMD(bus, devfn, where), 0xCF8); + outl(CONF_CMD(dev, where), 0xCF8); outl(value, 0xCFC); } diff --git a/src/device/pci_ops.c b/src/device/pci_ops.c index 12c4e26d0e..362a6ad7c2 100644 --- a/src/device/pci_ops.c +++ b/src/device/pci_ops.c @@ -36,41 +36,35 @@ static void pcidev_assert(const struct device *dev) u8 pci_read_config8(struct device *dev, unsigned int where) { pcidev_assert(dev); - return pci_bus_ops()->read8(dev->bus->secondary, - dev->path.pci.devfn, where); + return pci_bus_ops()->read8(dev, where); } u16 pci_read_config16(struct device *dev, unsigned int where) { pcidev_assert(dev); - return pci_bus_ops()->read16(dev->bus->secondary, - dev->path.pci.devfn, where); + return pci_bus_ops()->read16(dev, where); } u32 pci_read_config32(struct device *dev, unsigned int where) { pcidev_assert(dev); - return pci_bus_ops()->read32(dev->bus->secondary, - dev->path.pci.devfn, where); + return pci_bus_ops()->read32(dev, where); } void pci_write_config8(struct device *dev, unsigned int where, u8 val) { pcidev_assert(dev); - pci_bus_ops()->write8(dev->bus->secondary, - dev->path.pci.devfn, where, val); + pci_bus_ops()->write8(dev, where, val); } void pci_write_config16(struct device *dev, unsigned int where, u16 val) { pcidev_assert(dev); - pci_bus_ops()->write16(dev->bus->secondary, - dev->path.pci.devfn, where, val); + pci_bus_ops()->write16(dev, where, val); } void pci_write_config32(struct device *dev, unsigned int where, u32 val) { pcidev_assert(dev); - pci_bus_ops()->write32(dev->bus->secondary, - dev->path.pci.devfn, where, val); + pci_bus_ops()->write32(dev, where, val); } diff --git a/src/device/pci_ops_mmconf.c b/src/device/pci_ops_mmconf.c index d1f285fea5..9b03068169 100644 --- a/src/device/pci_ops_mmconf.c +++ b/src/device/pci_ops_mmconf.c @@ -23,43 +23,43 @@ * Functions for accessing PCI configuration space with mmconf accesses */ -#define PCI_MMIO_ADDR(SEGBUS, DEVFN, WHERE, MASK) \ +#define PCI_MMIO_ADDR(dev, where, mask) \ ((void *)(((uintptr_t)CONFIG_MMCONF_BASE_ADDRESS |\ - (((SEGBUS) & 0xFFF) << 20) |\ - (((DEVFN) & 0xFF) << 12) |\ - ((WHERE) & 0xFFF)) & ~MASK)) + (((dev)->bus->secondary & 0xFFF) << 20) |\ + (((dev)->path.pci.devfn & 0xFF) << 12) |\ + ((where) & 0xFFF)) & ~mask)) -static uint8_t pci_mmconf_read_config8(int bus, int devfn, int where) +static uint8_t pci_mmconf_read_config8(struct device *dev, int where) { - return read8(PCI_MMIO_ADDR(bus, devfn, where, 0)); + return read8(PCI_MMIO_ADDR(dev, where, 0)); } -static uint16_t pci_mmconf_read_config16(int bus, int devfn, int where) +static uint16_t pci_mmconf_read_config16(struct device *dev, int where) { - return read16(PCI_MMIO_ADDR(bus, devfn, where, 1)); + return read16(PCI_MMIO_ADDR(dev, where, 1)); } -static uint32_t pci_mmconf_read_config32(int bus, int devfn, int where) +static uint32_t pci_mmconf_read_config32(struct device *dev, int where) { - return read32(PCI_MMIO_ADDR(bus, devfn, where, 3)); + return read32(PCI_MMIO_ADDR(dev, where, 3)); } -static void pci_mmconf_write_config8(int bus, int devfn, int where, +static void pci_mmconf_write_config8(struct device *dev, int where, uint8_t value) { - write8(PCI_MMIO_ADDR(bus, devfn, where, 0), value); + write8(PCI_MMIO_ADDR(dev, where, 0), value); } -static void pci_mmconf_write_config16(int bus, int devfn, int where, +static void pci_mmconf_write_config16(struct device *dev, int where, uint16_t value) { - write16(PCI_MMIO_ADDR(bus, devfn, where, 1), value); + write16(PCI_MMIO_ADDR(dev, where, 1), value); } -static void pci_mmconf_write_config32(int bus, int devfn, int where, +static void pci_mmconf_write_config32(struct device *dev, int where, uint32_t value) { - write32(PCI_MMIO_ADDR(bus, devfn, where, 3), value); + write32(PCI_MMIO_ADDR(dev, where, 3), value); } static const struct pci_bus_operations pci_ops_mmconf = { diff --git a/src/include/device/pci.h b/src/include/device/pci.h index a4f6536e64..c1aea43f78 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -35,12 +35,12 @@ struct pci_operations { /* Common pci bus operations */ struct pci_bus_operations { - uint8_t (*read8)(int bus, int devfn, int where); - uint16_t (*read16)(int bus, int devfn, int where); - uint32_t (*read32)(int bus, int devfn, int where); - void (*write8)(int bus, int devfn, int where, uint8_t val); - void (*write16)(int bus, int devfn, int where, uint16_t val); - void (*write32)(int bus, int devfn, int where, uint32_t val); + uint8_t (*read8)(struct device *dev, int where); + uint16_t (*read16)(struct device *dev, int where); + uint32_t (*read32)(struct device *dev, int where); + void (*write8)(struct device *dev, int where, uint8_t val); + void (*write16)(struct device *dev, int where, uint16_t val); + void (*write32)(struct device *dev, int where, uint32_t val); }; struct pci_driver { |