diff options
| author | Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> | 2020-09-02 12:13:35 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2020-09-03 21:42:39 +0000 |
| commit | ae437c575f7b53a579230b16632f331f9e8edc30 (patch) | |
| tree | d873cf0ec5f3ef88ae50fcd994485328df6adc1d /src | |
| parent | b132bf5a87784a8a57677f43607095330be9f3a1 (diff) | |
| download | coreboot-ae437c575f7b53a579230b16632f331f9e8edc30.tar.xz | |
soc/amd/picasso/acpi: Remove padding in IVRS table caused by realignment.
Previous CL (1916f8969b10e27fe06b3e0eb1caae632bd947f6) misinterpreted
spec as requiring size alignment on all IVHD device entries. The correct
requirement specifies only for 4-byte entries. The unneeded realignments
result in gaps in the table. The kernel hangs in early boot due to the
malformed table.
Remove 8-byte entry alignment.
BUG=b:166519072
TEST=Boot fully to morphius board with and without amd_iommu kernel
parameter. Confirm IVRS contains no alignment gaps/corruption.
Change-Id: Iddcff98279be1d910936b13391dd2448a3bb2d74
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45050
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/picasso/agesa_acpi.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/soc/amd/picasso/agesa_acpi.c b/src/soc/amd/picasso/agesa_acpi.c index a651d6e4d0..c76e9439b3 100644 --- a/src/soc/amd/picasso/agesa_acpi.c +++ b/src/soc/amd/picasso/agesa_acpi.c @@ -47,8 +47,6 @@ static uintptr_t add_agesa_acpi_table(guid_t guid, const char *name, acpi_rsdp_t unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t *ivrs, unsigned long current) { - /* 8-byte IVHD structures must be aligned to the 8-byte boundary. */ - current = ALIGN_UP(current, 8); ivrs_ivhd_special_t *ivhd_ioapic = (ivrs_ivhd_special_t *)current; memset(ivhd_ioapic, 0, sizeof(*ivhd_ioapic)); @@ -75,8 +73,6 @@ unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t *ivrs, unsigned long current) static unsigned long ivhd_describe_hpet(unsigned long current) { - /* 8-byte IVHD structures must be aligned to the 8-byte boundary. */ - current = ALIGN_UP(current, 8); ivrs_ivhd_special_t *ivhd_hpet = (ivrs_ivhd_special_t *)current; ivhd_hpet->type = IVHD_DEV_8_BYTE_EXT_SPECIAL_DEV; @@ -93,8 +89,6 @@ static unsigned long ivhd_describe_hpet(unsigned long current) static unsigned long ivhd_describe_f0_device(unsigned long current, uint16_t dev_id, uint8_t datasetting) { - /* 8-byte IVHD structures must be aligned to the 8-byte boundary. */ - current = ALIGN_UP(current, 8); ivrs_ivhd_f0_entry_t *ivhd_f0 = (ivrs_ivhd_f0_entry_t *) current; ivhd_f0->type = IVHD_DEV_VARIABLE; @@ -154,8 +148,6 @@ static unsigned long add_ivhd_dev_entry(struct device *parent, struct device *de ivhd_entry->dte_setting = data; *current += sizeof(ivrs_ivhd_generic_t); } else if (type == IVHD_DEV_8_BYTE_ALIAS_SELECT) { - /* 8-byte IVHD structures must be aligned to the 8-byte boundary. */ - *current = ALIGN_UP(*current, 8); ivrs_ivhd_alias_t *ivhd_entry = (ivrs_ivhd_alias_t *)*current; ivhd_entry->type = type; |