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authorVadim Bendebury <vbendeb@chromium.org>2014-04-07 15:26:39 -0700
committerMarc Jones <marc.jones@se-eng.com>2014-11-09 02:00:46 +0100
commitb1709bd0b262fc98cf35ecfb8aef93ab1e0b6df4 (patch)
tree63079378d58a00a32baf494383209a81d7cb43a3 /src
parent25a282dabc5fb656a1402c26920974d129ef7917 (diff)
downloadcoreboot-b1709bd0b262fc98cf35ecfb8aef93ab1e0b6df4.tar.xz
Provide ability to integrate with QComm SBLs
Ipq8064 SBLs initialize the hardware to prepare it to run an arbitrary user provided bootloader. The only bootloader requirements imposed by the SBLs are that it is concatenated with the SBL chunks in the bootprm AND it uses MBN encapsulation (mostly to specify the size and load address). This patch adds configuration options to specify the location of the SBL blobs and to require MBN encapsulation of the bootblock. BRANCH=none BUG=chrome-os-partner:27784 TEST=manual - the below demonstrates added encapsulation, no code run attempts have been made yet: $ FEATURES=noclean emerge-storm coreboot $ cd /build/storm/tmp/portage/sys-boot/coreboot-9999/work/coreboot-9999 $ \od -t x4 build/cbfs/fallback/bootblock.bin | head -3 0000000 00000005 00000003 00000000 2a010000 0000020 00000be0 00000be0 2a010be0 00000000 0000040 2a010be0 00000000 e32bf0df e59f0030 Original-Change-Id: Iae30ad08059e2b35c434ac25a410ac2017752957 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/193511 (cherry picked from commit bf16ea915c723ab124d817e3b0d950282e3cf1c1) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I53c71d382ec1d826f530d7afb545f64ec4eaf96b Reviewed-on: http://review.coreboot.org/7261 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/qualcomm/ipq806x/Kconfig18
-rw-r--r--src/soc/qualcomm/ipq806x/Makefile.inc10
2 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index fcf8ccdeae..0f65990385 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -19,4 +19,22 @@ config CBFS_ROM_OFFSET
hex "offset of CBFS data in ROM"
default 0x18080
+config MBN_ENCAPSULATION
+ depends on USE_BLOBS
+ bool "bootblock encapsulation for ipq8064"
+ default y
+
+config SBL_BLOB
+ depends on USE_BLOBS
+ string "file name of the Qualcomm SBL blob"
+ default "3rdparty/cpu/qualcomm/ipq8064/sbls.bin"
+ help
+ The path and filename of the binary blob containing
+ ipq806x early initialization code, as supplied by the
+ vendor.
+
+config BOOTBLOCK_BASE
+ hex "64K bytes left for TZBSP"
+ default 0x2a010000
+
endif
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index be37581258..2487f46ab2 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -6,3 +6,13 @@ romstage-y += timer.c
ramstage-y += cbfs.c
ramstage-y += timer.c
+
+ifeq ($(CONFIG_MBN_ENCAPSULATION),y)
+
+$(objcbfs)/%.bin: $(objcbfs)/%.elf
+ @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
+ $(OBJCOPY_bootblock) -O binary $< $@.prembn
+ @printf " ADD MBN $(subst $(obj)/,,$(@))\n"
+ ./util/ipqheader/ipqheader.py $(CONFIG_BOOTBLOCK_BASE) $@.prembn $@.tmp
+ @mv $@.tmp $@
+endif