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authorStefan Reinauer <stefan.reinauer@coreboot.org>2011-10-13 16:53:11 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2011-10-14 08:12:25 +0200
commitb9d60c9ac8f878ebd5a69a0f87d9a9406b89c606 (patch)
tree71ccf9463855a2afb0a53e5c05f6113f686de3f5 /src
parent499af708ca6811843d33e8cc23f01fe7ce08c948 (diff)
downloadcoreboot-b9d60c9ac8f878ebd5a69a0f87d9a9406b89c606.tar.xz
fix compilation of intel/sch northbridge code with gcc 4.6
Change-Id: I57804dff9e37f0127900ebb7a67118382944eb89 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/264 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/sch/raminit.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/intel/sch/raminit.c b/src/northbridge/intel/sch/raminit.c
index 5e49682e51..ae308ee857 100644
--- a/src/northbridge/intel/sch/raminit.c
+++ b/src/northbridge/intel/sch/raminit.c
@@ -70,6 +70,9 @@ static u32 detect_softstrap_base(void)
case 4:
base_addr = 0xFFFE0000;
break;
+ default:
+ base_addr = 0;
+ die("No valid softstrap base found.\n");
}
return base_addr;
}