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authorMike M Hsieh <mike.m.hsieh@intel.com>2016-01-13 10:46:19 +0800
committerPatrick Georgi <pgeorgi@google.com>2016-01-19 16:39:02 +0100
commitbbef4bde2e47b9c240a9d300664645b780a8e08c (patch)
tree402355fcf52386a40706f260b4ca103c04d364b6 /src
parent31fa749b4d109d3528bc8e0225ce6c39290ca430 (diff)
downloadcoreboot-bbef4bde2e47b9c240a9d300664645b780a8e08c.tar.xz
google/chell: Modify DqsMap
Modify Dqs Byte Swizzling for channel 0 to honor chell's memory routing BUG=chrome-os-partner:48986 BRANCH=glados TEST=verified on chell system Signed-off-by: Mike Hsieh <mike.m.hsieh@intel.com> Change-Id: Ic0485526bc1378e329c5eb0eeb57ff67a9501e86 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: b60241e63381974655f5df5afcd913e95c17682b Original-Change-Id: I641502e8d303fa59e0f668d581745379e1ef4853 Original-Reviewed-on: https://chromium-review.googlesource.com/321524 Original-Commit-Ready: Duncan Laurie <dlaurie@chromium.org> Original-Tested-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/13012 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/chell/pei_data.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/chell/pei_data.c b/src/mainboard/google/chell/pei_data.c
index 0f97fd4865..84f38d9719 100644
--- a/src/mainboard/google/chell/pei_data.c
+++ b/src/mainboard/google/chell/pei_data.c
@@ -29,7 +29,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
0x33, 0x00, 0xFF, 0x00, 0xFF, 0x00 } };
/* DQS CPU<>DRAM map */
const u8 dqs_map[2][8] = {
- { 0, 1, 3, 2, 4, 5, 6, 7 },
+ { 0, 3, 1, 2, 4, 5, 6, 7 },
{ 1, 0, 4, 5, 2, 3, 6, 7 } };
/* Rcomp resistor */