summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorLee Leahy <leroy.p.leahy@intel.com>2015-04-28 18:21:25 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-04-30 00:18:46 +0200
commitbdd98254abf964692f193fe42ebffbd01d0b22b8 (patch)
tree9579a91205bc6839ec6097a29fb5a8418b26f9c9 /src
parent6e944c467ca28a8c4d7d0c0ff4b6e2ad8232a55b (diff)
downloadcoreboot-bdd98254abf964692f193fe42ebffbd01d0b22b8.tar.xz
cbmem: Identify the FSP areas in CBMEM
Add identifers and descriptions for the FSP areas within CBMEM. BRANCH=none BUG=None TEST=Build for Braswell and Skylake boards using FSP 1.1. Change-Id: I4d58f7f08cfbc17f3aef261c835b92d8d65f6622 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10026 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/include/cbmem.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 936fdf6838..c5cd52a80b 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -54,6 +54,8 @@
#define CBMEM_ID_EHCI_DEBUG 0xe4c1deb9
#define CBMEM_ID_ELOG 0x454c4f47
#define CBMEM_ID_FREESPACE 0x46524545
+#define CBMEM_ID_FSP_RESERVED_MEMORY 0x46535052
+#define CBMEM_ID_FSP_RUNTIME 0x52505346
#define CBMEM_ID_GDT 0x4c474454
#define CBMEM_ID_HOB_POINTER 0x484f4221
#define CBMEM_ID_IGD_OPREGION 0x4f444749
@@ -101,6 +103,8 @@
{ CBMEM_ID_EHCI_DEBUG, "USBDEBUG " }, \
{ CBMEM_ID_ELOG, "ELOG " }, \
{ CBMEM_ID_FREESPACE, "FREE SPACE " }, \
+ { CBMEM_ID_FSP_RESERVED_MEMORY, "FSP MEMORY " }, \
+ { CBMEM_ID_FSP_RUNTIME, "FSP RUNTIME" }, \
{ CBMEM_ID_GDT, "GDT " }, \
{ CBMEM_ID_IMD_ROOT, "IMD ROOT " }, \
{ CBMEM_ID_IMD_SMALL, "IMD SMALL " }, \