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authorElyes HAOUAS <ehaouas@noos.fr>2020-03-25 08:05:28 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-26 13:07:59 +0000
commitbfa8166b71e927d076b64d2c17131056c1577be8 (patch)
treedf682a0b25a21980a68fad754462425329846e2c /src
parent8a7aff4b0b8bf59e73ad6f45d56c5c7c879dcd48 (diff)
downloadcoreboot-bfa8166b71e927d076b64d2c17131056c1577be8.tar.xz
mb/google/hatch/variants/nightfury: Replace unneeded white spaces by tabs
Change-Id: Icda241cfac7b428176515d7996a48cb01b1dc976 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39815 Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/hatch/variants/nightfury/overridetree.cb54
1 files changed, 27 insertions, 27 deletions
diff --git a/src/mainboard/google/hatch/variants/nightfury/overridetree.cb b/src/mainboard/google/hatch/variants/nightfury/overridetree.cb
index a35e99df99..a940f8bc19 100644
--- a/src/mainboard/google/hatch/variants/nightfury/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/nightfury/overridetree.cb
@@ -23,19 +23,19 @@ chip soc/intel/cannonlake
# Enable DMIC1
register "PchHdaAudioLinkDmic1" = "1"
- register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)" # Type-C Port 0
- register "usb2_ports[1]" = "USB2_PORT_LONG(OC2)" # Type-C Port 1
+ register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)" # Type-C Port 0
+ register "usb2_ports[1]" = "USB2_PORT_LONG(OC2)" # Type-C Port 1
register "usb2_ports[2]" = "USB2_PORT_EMPTY"
register "usb2_ports[3]" = "USB2_PORT_EMPTY"
register "usb2_ports[4]" = "USB2_PORT_EMPTY"
register "usb2_ports[5]" = "USB2_PORT_EMPTY"
- register "usb2_ports[6]" = "USB2_PORT_LONG(OC_SKIP)" # Camera
+ register "usb2_ports[6]" = "USB2_PORT_LONG(OC_SKIP)" # Camera
register "usb2_ports[7]" = "USB2_PORT_EMPTY"
register "usb2_ports[8]" = "USB2_PORT_EMPTY"
- register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # CnVi BT
+ register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # CnVi BT
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 0
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 1
+ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 0
+ register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 1
register "usb3_ports[2]" = "USB3_PORT_EMPTY"
register "usb3_ports[3]" = "USB3_PORT_EMPTY"
register "usb3_ports[4]" = "USB3_PORT_EMPTY"
@@ -72,8 +72,8 @@ chip soc/intel/cannonlake
.fall_time_ns = 52,
},
.gspi[0] = {
- .speed_mhz = 1,
- .early_init = 1,
+ .speed_mhz = 1,
+ .early_init = 1,
},
}"
@@ -200,29 +200,29 @@ chip soc/intel/cannonlake
device pci 15.0 on
chip drivers/i2c/generic
- register "hid" = ""ELAN0000""
- register "desc" = ""ELAN Touchpad""
- register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_A21_IRQ)"
- register "probed" = "1"
- register "wake" = "GPE0_DW0_21"
- device i2c 0x15 on end
- end
+ register "hid" = ""ELAN0000""
+ register "desc" = ""ELAN Touchpad""
+ register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_A21_IRQ)"
+ register "probed" = "1"
+ register "wake" = "GPE0_DW0_21"
+ device i2c 0x15 on end
+ end
end # I2C 0
device pci 15.1 on
chip drivers/i2c/hid
- register "generic.hid" = ""ELAN902C""
- register "generic.desc" = ""ELAN Touchscreen""
- register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)"
- register "generic.probed" = "1"
- register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C12)"
- register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
- register "generic.reset_delay_ms" = "20"
- register "generic.has_power_resource" = "1"
- register "generic.disable_gpio_export_in_crs" = "1"
- register "hid_desc_reg_offset" = "0x01"
- device i2c 0x10 on end
- end
+ register "generic.hid" = ""ELAN902C""
+ register "generic.desc" = ""ELAN Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)"
+ register "generic.probed" = "1"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C12)"
+ register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
+ register "generic.reset_delay_ms" = "20"
+ register "generic.has_power_resource" = "1"
+ register "generic.disable_gpio_export_in_crs" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 0x10 on end
+ end
end # I2C #1
device pci 15.2 off end # I2C #2