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| author | Nina Wu <nina-cm.wu@mediatek.com> | 2021-04-27 17:32:41 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-05 11:46:08 +0000 |
| commit | c37d7b979f25332f8dec63cd70e7d8c39eef325d (patch) | |
| tree | 1f979860750a577e96dbc7359358f097210bd48b /src | |
| parent | ce38084db66858e9bdd787439d8156e6ec53fbfe (diff) | |
| download | coreboot-c37d7b979f25332f8dec63cd70e7d8c39eef325d.tar.xz | |
soc/mediatek/mt8192: devapc: update domain remap setting
Update domain remap setting to prevent DSP (domain 4)
from accessing registers.
Change-Id: Iefa9e75db85482a6c016b8b423c0b05f97e585b1
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52705
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/mediatek/mt8192/devapc.c | 54 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8192/include/soc/devapc.h | 15 |
2 files changed, 54 insertions, 15 deletions
diff --git a/src/soc/mediatek/mt8192/devapc.c b/src/soc/mediatek/mt8192/devapc.c index e854727355..1fdc519c28 100644 --- a/src/soc/mediatek/mt8192/devapc.c +++ b/src/soc/mediatek/mt8192/devapc.c @@ -19,29 +19,33 @@ static void infra_master_init(uintptr_t base) /* * Domain Remap: TINYSYS to non-EMI (3-bit to 4-bit) - * 1. SCP from 3 to 3 - * 2. others from XXX to 15 + * 1. SCP from 3 to 3 + * 2. DSP from 4 to 4 + * 3. others from XXX to 15 */ SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0), FOUR_BIT_DOM_REMAP_0, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_1, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_2, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_3, MAS_DOMAIN_3, - FOUR_BIT_DOM_REMAP_4, MAS_DOMAIN_15, + FOUR_BIT_DOM_REMAP_4, MAS_DOMAIN_4, FOUR_BIT_DOM_REMAP_5, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_6, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_7, MAS_DOMAIN_15); /* * Domain Remap: MMSYS slave domain remap (4-bit to 2-bit) - * 1. From domain 0 ~ 3 to domain 0 ~ 3 - * 2. others from XXX to domain 0 + * 1. From domain 0 to domain 0 (no protection for all) + * 2. From domain 1, 2, 4 to domain 1 (forbidden for all) + * 3. From domain 3 to domain 3 + * 4. others from XXX to domain 0 */ SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0), TWO_BIT_DOM_REMAP_0, MAS_DOMAIN_0, TWO_BIT_DOM_REMAP_1, MAS_DOMAIN_1, - TWO_BIT_DOM_REMAP_2, MAS_DOMAIN_2, - TWO_BIT_DOM_REMAP_3, MAS_DOMAIN_3); + TWO_BIT_DOM_REMAP_2, MAS_DOMAIN_1, + TWO_BIT_DOM_REMAP_3, MAS_DOMAIN_3, + TWO_BIT_DOM_REMAP_4, MAS_DOMAIN_1); } @@ -49,20 +53,48 @@ static void peri_master_init(uintptr_t base) { /* Domain */ SET32_BITFIELDS(getreg(base, MAS_DOM_0), SPM_DOM, MAS_DOMAIN_2); + + /* + * Domain Remap: CONNSYS slave domain remap (4-bit to 2-bit) + * 1. From domain 0 to domain 0 (no protection for all) + * 2. From domain 1 ~ 4 to domain 1 (forbidden for all) + * 3. others from XXX to domain 0 + */ + SET32_BITFIELDS(getreg(base, DOM_REMAP_1_0), + TWO_BIT_DOM_REMAP_0, MAS_DOMAIN_0, + TWO_BIT_DOM_REMAP_1, MAS_DOMAIN_1, + TWO_BIT_DOM_REMAP_2, MAS_DOMAIN_1, + TWO_BIT_DOM_REMAP_3, MAS_DOMAIN_1, + TWO_BIT_DOM_REMAP_4, MAS_DOMAIN_1); + + /* + * Domain Remap: TINYSYS slave domain remap (4-bit to 3-bit) + * 1. From domain 0 to domain 0 (no protection for all) + * 2. From domain 1 ~ 4 to domain 1 (forbidden for all) + * 3. others from XXX to domain 0 + */ + SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0), + THREE_BIT_DOM_REMAP_0, MAS_DOMAIN_0, + THREE_BIT_DOM_REMAP_1, MAS_DOMAIN_1, + THREE_BIT_DOM_REMAP_2, MAS_DOMAIN_1, + THREE_BIT_DOM_REMAP_3, MAS_DOMAIN_1, + THREE_BIT_DOM_REMAP_4, MAS_DOMAIN_1); } static void fmem_master_init(uintptr_t base) { - /* Domain Remap: TINYSYS to EMI (3-bit to 4-bit) - * 1. SCP from 3 to 3 - * 2. others from XXX to 15 + /* + * Domain Remap: TINYSYS to EMI (3-bit to 4-bit) + * 1. SCP from 3 to 3 + * 2. DSP from 4 to 4 + * 3. others from XXX to 15 */ SET32_BITFIELDS(getreg(base, DOM_REMAP_0_0), FOUR_BIT_DOM_REMAP_0, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_1, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_2, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_3, MAS_DOMAIN_3, - FOUR_BIT_DOM_REMAP_4, MAS_DOMAIN_15, + FOUR_BIT_DOM_REMAP_4, MAS_DOMAIN_4, FOUR_BIT_DOM_REMAP_5, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_6, MAS_DOMAIN_15, FOUR_BIT_DOM_REMAP_7, MAS_DOMAIN_15); diff --git a/src/soc/mediatek/mt8192/include/soc/devapc.h b/src/soc/mediatek/mt8192/include/soc/devapc.h index e79acfa2b9..921f36e81c 100644 --- a/src/soc/mediatek/mt8192/include/soc/devapc.h +++ b/src/soc/mediatek/mt8192/include/soc/devapc.h @@ -68,9 +68,16 @@ DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_5, 23, 20) DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_6, 27, 24) DEFINE_BITFIELD(FOUR_BIT_DOM_REMAP_7, 31, 28) -DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0, 1, 0) -DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_1, 3, 2) -DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_2, 5, 4) -DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_3, 7, 6) +DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_0, 2, 0) +DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_1, 5, 3) +DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_2, 8, 6) +DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_3, 11, 9) +DEFINE_BITFIELD(THREE_BIT_DOM_REMAP_4, 14, 12) + +DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_0, 1, 0) +DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_1, 3, 2) +DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_2, 5, 4) +DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_3, 7, 6) +DEFINE_BITFIELD(TWO_BIT_DOM_REMAP_4, 9, 8) #endif /* SOC_MEDIATEK_MT8192_DEVAPC_H */ |