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authorKyösti Mälkki <kyosti.malkki@gmail.com>2013-07-29 10:16:14 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-09-11 07:03:44 +0200
commitc984f4f30333cde88fbd14a188c5ce599d0fc77c (patch)
tree6fce8f773cced905a2e0c9375d582ed6fad9b26e /src
parent6f9fa8634a4d41f475137fc66db2bffd810195f8 (diff)
downloadcoreboot-c984f4f30333cde88fbd14a188c5ce599d0fc77c.tar.xz
AMD AGESA: Place CAR_GLOBAL in BSP stack
Use BSP CPU's stack space to store CAR GLOBALS for the duration of romstage before CAR migration. NOTE: Such globals can only be accessed from BSP CPU due the way AMD platform has memory architecture set up. TODO: Add compile-time assertions to verify CAR configuration matches with the programming in vendorcode. Change-Id: Ica4700433268f484ce69a24d934732f9cfd4ba41 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3832 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Diffstat (limited to 'src')
-rw-r--r--src/cpu/amd/agesa/Kconfig12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig
index 142ba8ebdf..9a3f1743a9 100644
--- a/src/cpu/amd/agesa/Kconfig
+++ b/src/cpu/amd/agesa/Kconfig
@@ -51,6 +51,18 @@ config UDELAY_LAPIC_FIXED_FSB
int
default 200
+# TODO: Sync these with definitions in AGESA vendorcode.
+# DCACHE_RAM_BASE must equal BSP_STACK_BASE_ADDR.
+# DCACHE_RAM_SIZE must equal BSP_STACK_SIZE.
+
+config DCACHE_RAM_BASE
+ hex
+ default 0x30000
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x10000
+
source src/cpu/amd/agesa/family10/Kconfig
source src/cpu/amd/agesa/family12/Kconfig
source src/cpu/amd/agesa/family14/Kconfig