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authorLee Leahy <leroy.p.leahy@intel.com>2016-06-08 13:40:08 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-06-11 19:16:21 +0200
commitd131ea30785d0d862e169135a9d4c24afaeaa8c0 (patch)
tree6258990df01907fde503e6d5b07dd98f8614504b /src
parentfdc8c8b5fa88494ee5f62572830de10d4187dcce (diff)
downloadcoreboot-d131ea30785d0d862e169135a9d4c24afaeaa8c0.tar.xz
arch/x86: Add debug spinloops in assembly_entry.S
Use Kconfig values to enable debug spinloops in assembly_entry.S. This makes it easy to debug the assembly code. TEST=Build and run on Galileo Gen2 Change-Id: Ic56bf2260b8e3181403623961874c9289f3ca945 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/15135 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/Kconfig14
-rw-r--r--src/arch/x86/assembly_entry.S11
2 files changed, 25 insertions, 0 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 8609e20136..1fea99ac3b 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -179,3 +179,17 @@ config VERSTAGE_ADDR
# from a program loaded in ram and subsequently loading ramstage.
config POSTCAR_STAGE
def_bool n
+
+config VERSTAGE_DEBUG_SPINLOOP
+ bool
+ default n
+ help
+ Add a spin (JMP .) in assembly_entry.S during early verstage to wait
+ for a JTAG debugger to break into the execution sequence.
+
+config ROMSTAGE_DEBUG_SPINLOOP
+ bool
+ default n
+ help
+ Add a spin (JMP .) in assembly_entry.S during early romstage to wait
+ for a JTAG debugger to break into the execution sequence.
diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S
index 86dbba4668..d1f5d61ce7 100644
--- a/src/arch/x86/assembly_entry.S
+++ b/src/arch/x86/assembly_entry.S
@@ -52,6 +52,17 @@ _start:
sub %edi, %ecx
rep stosl
+#if ((ENV_VERSTAGE && IS_ENABLED(CONFIG_VERSTAGE_DEBUG_SPINLOOP)) \
+ || (ENV_ROMSTAGE && IS_ENABLED(CONFIG_ROMSTAGE_DEBUG_SPINLOOP)))
+
+ /* Wait for a JTAG debugger to break in and set EBX non-zero */
+ xor %ebx, %ebx
+
+debug_spinloop:
+ cmp $0, %ebx
+ jz debug_spinloop
+#endif
+
jmp car_stage_entry
/* This is here for linking purposes. */