diff options
author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-01-21 09:45:15 +0100 |
---|---|---|
committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-02-01 20:17:59 +0100 |
commit | d69757bd4ed9f39deae15d08d3f0988e068480be (patch) | |
tree | 177706c01f654a114a0ec33b5db155833f599160 /src | |
parent | 707b35bcddf798674adb85efe63499d2ebfa48fc (diff) | |
download | coreboot-d69757bd4ed9f39deae15d08d3f0988e068480be.tar.xz |
lenovo/x201: Skip AT24RF08 detection.
AT24RF08 was inherited from RE of original BIOS. As we don't really care
if the chip in question is really AT24RF08 or a generic replacement,
we can skip this check.
Change-Id: I862dd66b2332314beb835f215f1c1cd838aa07b9
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4769
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/lenovo/x201/romstage.c | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 5eb4fb9dd4..e3e0a628f8 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -183,30 +183,6 @@ static void rcba_config(void) } } -static void setup_smbus_5c(void) -{ - u16 t3; - - /* We have a muxed bus, hence all the GPIO accesses. */ - if (MCHBAR8(0x2ca8) == 0) { - t3 = inw(DEFAULT_GPIOBASE | 0x38); - outw(t3 & ~0x400, DEFAULT_GPIOBASE | 0x38); - smbus_read_byte(0x5c, 0x06); - smbus_write_byte(0x5c, 0x06, 0x8f); - - smbus_read_byte(0x5c, 0x07); - smbus_write_byte(0x5c, 0x07, 0x8f); - - outw(t3 | 0x400, DEFAULT_GPIOBASE | 0x38); - } - - t3 = inw(DEFAULT_GPIOBASE | 0x38); - outw(t3 & ~0x400, DEFAULT_GPIOBASE | 0x38); - - smbus_read_byte(0x57, 0x55); - outw(t3 | 0x400, DEFAULT_GPIOBASE | 0x38); -} - static inline void write_acpi32(u32 addr, u32 val) { outl(val, DEFAULT_PMBASE | addr); @@ -287,8 +263,6 @@ void main(unsigned long bist) /* Enable SMBUS. */ enable_smbus(); - setup_smbus_5c(); - outb((inb(DEFAULT_GPIOBASE | 0x3a) & ~0x2) | 0x20, DEFAULT_GPIOBASE | 0x3a); outb(0x50, 0x15ec); |