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authorKarthikeyan Ramasubramanian <kramasub@google.com>2020-07-16 00:41:50 -0600
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-07-23 15:30:51 +0000
commitd90616278c16f3b4316eea14259917e77f8de5ca (patch)
treea032e944b60496a7ab0fd28e5af3f5a7813df5f4 /src
parentdcee4b6fa95d52d78f068ee3bac4147b8c9f074a (diff)
downloadcoreboot-d90616278c16f3b4316eea14259917e77f8de5ca.tar.xz
mb/google/dedede/var/drawcia: Generate SPD ID for supported parts
Add supported memory parts in the mem_list_variant.txt and generate the SPD ID for the parts. The memory parts being added are: H9HCNNNBKMMLXR-NEE K4U6E3S4AA-MGCR BUG=None TEST=Build the drawcia board. Change-Id: Id05c0b2a87b64bfedc761949cbc8ad6cf7dd73a5 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43505 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Marco Chen <marcochen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc2
-rw-r--r--src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt2
-rw-r--r--src/mainboard/google/dedede/variants/drawcia/memory/mem_list_variant.txt2
3 files changed, 5 insertions, 1 deletions
diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc b/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc
index 573213b877..78ae8048a7 100644
--- a/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc
+++ b/src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc
@@ -2,4 +2,4 @@
## This is an auto-generated file. Do not edit!!
SPD_SOURCES =
-SPD_SOURCES += spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E
+SPD_SOURCES += spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR
diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt b/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt
index a825c3ae8c..856d016914 100644
--- a/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt
+++ b/src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt
@@ -1,2 +1,4 @@
DRAM Part Name ID to assign
MT53E512M32D2NP-046 WT:E 0 (0000)
+H9HCNNNBKMMLXR-NEE 0 (0000)
+K4U6E3S4AA-MGCR 0 (0000)
diff --git a/src/mainboard/google/dedede/variants/drawcia/memory/mem_list_variant.txt b/src/mainboard/google/dedede/variants/drawcia/memory/mem_list_variant.txt
index 20887c1b63..26c06b6f40 100644
--- a/src/mainboard/google/dedede/variants/drawcia/memory/mem_list_variant.txt
+++ b/src/mainboard/google/dedede/variants/drawcia/memory/mem_list_variant.txt
@@ -1 +1,3 @@
MT53E512M32D2NP-046 WT:E
+H9HCNNNBKMMLXR-NEE
+K4U6E3S4AA-MGCR