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authorJeremy Soller <jeremy@system76.com>2019-07-01 07:52:19 -0600
committerMartin Roth <martinroth@google.com>2019-07-06 18:19:37 +0000
commite458bcd099b5fd97c39a424bcc47e99818942487 (patch)
treea941fd5034951e036ef5436b508abd7c2dc655ba /src
parent5ee4c12ebb8ad82a62ab2325a9e972757534962e (diff)
downloadcoreboot-e458bcd099b5fd97c39a424bcc47e99818942487.tar.xz
soc/intel/cannonlake: Fix outb order
outb accepts a value followed by a port Change-Id: I6fe3961b4f8cb2454e3b2564c3eae6af06c9e69d Signed-off-by: Jeremy Soller <jeremy@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33940 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Lance Zhao <lance.zhao@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/cannonlake/lpc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c
index 6cc34515d7..1fe04169c1 100644
--- a/src/soc/intel/cannonlake/lpc.c
+++ b/src/soc/intel/cannonlake/lpc.c
@@ -201,10 +201,10 @@ static void pch_misc_init(void)
/* Setup NMI on errors, disable SERR */
reg8 = (inb(0x61)) & 0xf0;
- outb(0x61, (reg8 | (1 << 2)));
+ outb((reg8 | (1 << 2)), 0x61);
/* Disable NMI sources */
- outb(0x70, (1 << 7));
+ outb((1 << 7), 0x70);
};
void lpc_soc_init(struct device *dev)