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authorYidi Lin <yidi.lin@mediatek.com>2020-12-07 20:43:50 +0800
committerHung-Te Lin <hungte@chromium.org>2020-12-10 03:22:24 +0000
commiteb69dd60ef995ddddd2c831bc006e7397ddbcf79 (patch)
tree91d46ba926235481b69d32456e15cfb6924b04fb /src
parentc221d56478ddb1a364048ea2eb74cb26284eedf8 (diff)
downloadcoreboot-eb69dd60ef995ddddd2c831bc006e7397ddbcf79.tar.xz
soc/mediatek/mt8183: Use mtk_init_mcu to init SSPM
Use mtk_init_mcu API to load and run sspm firmware. TEST=emerge-kukui coreboot Change-Id: I63c4b99342bdebb2a94cbf0c6380b0a6817853e7 Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48233 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/mediatek/mt8183/Kconfig7
-rw-r--r--src/soc/mediatek/mt8183/Makefile.inc1
-rw-r--r--src/soc/mediatek/mt8183/sspm.c31
3 files changed, 23 insertions, 16 deletions
diff --git a/src/soc/mediatek/mt8183/Kconfig b/src/soc/mediatek/mt8183/Kconfig
index 82827d1755..ce99c76c8c 100644
--- a/src/soc/mediatek/mt8183/Kconfig
+++ b/src/soc/mediatek/mt8183/Kconfig
@@ -45,4 +45,11 @@ config MEMORY_TEST
bool
default y
+config SSPM_FIRMWARE
+ string
+ default "sspm.bin"
+ help
+ The file name of the MediaTek SSPM firmware.
+
+
endif
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc
index 43893c363d..b5d5173b70 100644
--- a/src/soc/mediatek/mt8183/Makefile.inc
+++ b/src/soc/mediatek/mt8183/Makefile.inc
@@ -50,6 +50,7 @@ ramstage-y += ../common/ddp.c ddp.c
ramstage-y += ../common/dsi.c dsi.c
ramstage-y += ../common/gpio.c gpio.c
ramstage-y += ../common/i2c.c i2c.c
+ramstage-y += ../common/mcu.c
ramstage-y += ../common/mmu_operations.c mmu_operations.c
ramstage-y += ../common/mtcmos.c mtcmos.c
ramstage-y += ../common/pmic_wrap.c
diff --git a/src/soc/mediatek/mt8183/sspm.c b/src/soc/mediatek/mt8183/sspm.c
index 1a4ba9e88f..e0ac84a1e3 100644
--- a/src/soc/mediatek/mt8183/sspm.c
+++ b/src/soc/mediatek/mt8183/sspm.c
@@ -1,26 +1,25 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/barrier.h>
-#include <cbfs.h>
-#include <console/console.h>
#include <device/mmio.h>
+#include <soc/mcu_common.h>
#include <soc/sspm.h>
-#include <string.h>
+#include <soc/symbols.h>
-#define BUF_SIZE (64 * KiB)
-static uint8_t sspm_bin[BUF_SIZE] __aligned(8);
+static void reset_sspm(struct mtk_mcu *mcu)
+{
+ write32(&mt8183_sspm->sw_rstn, 0x1);
+}
+
+static struct mtk_mcu sspm = {
+ .firmware_name = CONFIG_SSPM_FIRMWARE,
+ .run_address = (void *)SSPM_SRAM_BASE,
+ .reset = reset_sspm,
+};
void sspm_init(void)
{
- const char *file_name = "sspm.bin";
- size_t fw_size = cbfs_load(file_name, sspm_bin, sizeof(sspm_bin));
-
- if (fw_size == 0)
- die("SSPM file :sspm.bin not found.");
+ sspm.load_buffer = _dram_dma;
+ sspm.buffer_size = REGION_SIZE(dram_dma);
- memcpy((void *)SSPM_SRAM_BASE, sspm_bin, fw_size);
- /* Memory barrier to ensure that all fw code is loaded
- before we release the reset pin. */
- mb();
- write32(&mt8183_sspm->sw_rstn, 0x1);
+ mtk_init_mcu(&sspm);
}