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authorElyes HAOUAS <ehaouas@noos.fr>2018-03-11 18:34:53 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-03-14 11:17:42 +0000
commitec19354b9aee8c12a8e9728c33b6b47230359960 (patch)
tree341eaff6e1ca842dfb35daf6243ac6abf73c9caa /src
parent6575306663987225080abbe3d5b1e70ba5302e84 (diff)
downloadcoreboot-ec19354b9aee8c12a8e9728c33b6b47230359960.tar.xz
src/device/dram/ddr2: Fix supported burst lengths
Supported burst lengths are described at byte 16 Change-Id: I502710bdac7eec715b29febefd64be88e5a1b80a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25098 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r--src/device/dram/ddr2.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/device/dram/ddr2.c b/src/device/dram/ddr2.c
index eefb569b25..921679c584 100644
--- a/src/device/dram/ddr2.c
+++ b/src/device/dram/ddr2.c
@@ -572,11 +572,11 @@ int spd_decode_ddr2(struct dimm_attr_ddr2_st *dimm, u8 spd[SPD_SIZE_MAX_DDR2])
/* SDRAM Supported Burst length */
printram(" Burst length :");
- if (spd[16] & 0x06) {
+ if (spd[16] & 0x08) {
dimm->flags.bl8 = 1;
printram(" BL8");
}
- if (spd[22] & 0x04) {
+ if (spd[16] & 0x04) {
dimm->flags.bl4 = 1;
printram(" BL4");
}