AMD/Bettong: add function to read board version

Bettong uses 3 GPIO(5-7) pins to identify board.
The GPIO ports are mapped to MMIO space.
The GPIO value and board version are mapped as follow:
GPIO5 GPIO6 GPIO7 Version
  0     0     0      A
  0     0     1      B
  ......
  1     1     1      H

Change-Id: I72df28043057d8c4ccc4a2e645011ca5379e9928
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/11732
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

2 files changed, 50 insertions, 0 deletions

diff --git a/src/mainboard/amd/bettong/Makefile.inc b/src/mainboard/amd/bettong/Makefile.inc
index 0361362d06..5358d926ea 100644
--- a/src/mainboard/amd/bettong/Makefile.inc
+++ b/src/mainboard/amd/bettong/Makefile.inc
@@ -15,9 +15,11 @@
 
 romstage-y += BiosCallOuts.c
 romstage-y += PlatformGnbPcie.c
+romstage-y += boardid.c
 
 ramstage-y += BiosCallOuts.c
 ramstage-y += PlatformGnbPcie.c
 ifeq ($(CONFIG_HUDSON_IMC_FWM), y)
 ramstage-y += fchec.c
 endif
+ramstage-y += boardid.c
diff --git a/src/mainboard/amd/bettong/boardid.c b/src/mainboard/amd/bettong/boardid.c
new file mode 100644
index 0000000000..ae33328c1f
--- /dev/null
+++ b/src/mainboard/amd/bettong/boardid.c
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <arch/io.h>
+#include <boardid.h>
+
+/**
+ *Bettong uses 3 GPIO(5-7) pins to identify board.
+ *The GPIO ports are mapped to MMIO space.
+ *The GPIO value and board version are mapped as follow:
+ *GPIO5 GPIO6 GPIO7 Version
+ *  0     0     0      A
+ *  0     0     1      B
+ *  ......
+ *  1     1     1      H
+ */
+uint8_t board_id(void)
+{
+	void *gpiommioaddr;
+	u8  value = 0;
+	u8  boardrev = 0;
+	char boardid;
+
+	gpiommioaddr = (void *)0xfed80000ul + 0x1500;
+	value = read8(gpiommioaddr + (7 << 2) + 2); /* agpio7: board_id2 */
+	boardrev = value & 1;
+	value = read8(gpiommioaddr + (6 << 2) + 2); /* agpio6: board_id1 */
+	boardrev |= (value & 1) << 1;
+	value = read8(gpiommioaddr + (5 << 2) + 2); /* agpio5: board_id0 */
+	boardrev |= (value & 1) << 2;
+
+	boardid = 'A' + boardrev;
+
+	return boardid;
+}