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authorElyes HAOUAS <ehaouas@noos.fr>2021-02-09 14:45:50 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-11 10:23:17 +0000
commitf4f2132c64777264cec98a393c7f9867f7a9cba9 (patch)
tree28cd8f4082e659c6147eaad8e9ebe81cddff826a /src
parent388aaf734b4b3a8f0bc806d51bc6a951397be07c (diff)
downloadcoreboot-f4f2132c64777264cec98a393c7f9867f7a9cba9.tar.xz
src/mainboard: Remove unneeded whitespace before tab
Change-Id: I37f12f5cb35ea1a6ad33edb114688ce1619030a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50433 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/acer/g43t-am3/devicetree.cb4
-rw-r--r--src/mainboard/hp/snb_ivb_laptops/devicetree.cb2
-rw-r--r--src/mainboard/siemens/chili/variants/chili/devicetree.cb6
3 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/acer/g43t-am3/devicetree.cb b/src/mainboard/acer/g43t-am3/devicetree.cb
index 4266861bdc..a713f34f70 100644
--- a/src/mainboard/acer/g43t-am3/devicetree.cb
+++ b/src/mainboard/acer/g43t-am3/devicetree.cb
@@ -108,7 +108,7 @@ chip northbridge/intel/x4x # Northbridge
irq 0x70 = 0x0c
irq 0xf0 = 0x00
end
- device pnp 2e.7 on # GPIO
+ device pnp 2e.7 on # GPIO
io 0x60 = 0x000
io 0x62 = 0xa20
io 0x64 = 0xa30
@@ -140,7 +140,7 @@ chip northbridge/intel/x4x # Northbridge
end
end
device pci 1f.2 on end # SATA (IDE: port 0-3, AHCI/RAID: 0-5)
- device pci 1f.3 on # SMBus
+ device pci 1f.3 on # SMBus
chip drivers/i2c/ck505 # IDT CV194
register "mask" = "{ 0xff, 0xff, 0xff, 0x00,
0xff, 0x00, 0x00, 0x00,
diff --git a/src/mainboard/hp/snb_ivb_laptops/devicetree.cb b/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
index c1e80c858b..a44920083e 100644
--- a/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
@@ -44,7 +44,7 @@ chip northbridge/intel/sandybridge
device pci 1b.0 on end # HD Audio controller
device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge
- device pci 1f.0 on # LPC bridge
+ device pci 1f.0 on # LPC bridge
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
diff --git a/src/mainboard/siemens/chili/variants/chili/devicetree.cb b/src/mainboard/siemens/chili/variants/chili/devicetree.cb
index 8595ce862c..4416dbfafa 100644
--- a/src/mainboard/siemens/chili/variants/chili/devicetree.cb
+++ b/src/mainboard/siemens/chili/variants/chili/devicetree.cb
@@ -55,11 +55,11 @@ chip soc/intel/cannonlake
register "vin[4].high" = "12000 * 105/100"
register "temp_in[0].low" = "-25"
- register "temp_in[0].high" = " 85"
+ register "temp_in[0].high" = " 85"
register "temp_in[1].low" = "-25"
- register "temp_in[1].high" = " 85"
+ register "temp_in[1].high" = " 85"
register "temp_in[2].low" = "-25"
- register "temp_in[2].high" = " 85"
+ register "temp_in[2].high" = " 85"
register "fan[0]" = "{
.mode = LM96000_FAN_HOTTEST_123,