diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-05-22 09:55:22 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-05-25 00:17:34 +0200 |
| commit | fd45658a68fbb55027e73088cd402fe822a6ce96 (patch) | |
| tree | f730a7e4bcfef90dfdfab0352cab501c7e8bf6f2 /src | |
| parent | 2c51572435e8d7bded99ff4c83fc392cdae47772 (diff) | |
| download | coreboot-fd45658a68fbb55027e73088cd402fe822a6ce96.tar.xz | |
soc/intel/quark: Add USB device port support
Add initialization for the USB device port.
TEST=Build and run on Galileo Gen2
Change-Id: Icf83747f778f6e1ac976cd448a94311030e79e4f
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14941
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/quark/ehci.c | 33 | ||||
| -rw-r--r-- | src/soc/intel/quark/include/soc/pci_devs.h | 3 |
2 files changed, 33 insertions, 3 deletions
diff --git a/src/soc/intel/quark/ehci.c b/src/soc/intel/quark/ehci.c index ed9112ca10..2524fa7f83 100644 --- a/src/soc/intel/quark/ehci.c +++ b/src/soc/intel/quark/ehci.c @@ -28,11 +28,17 @@ #define EHCI_OUT_THRESHOLD_VALUE 0x7f #define EHCI_IN_THRESHOLD_VALUE 0x7f +/* Platform init USB device interrupt masks */ +#define V_IOH_USBDEVICE_D_INTR_MSK_UDC_REG (0x0000007f) +#define V_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG \ + (B_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG_OUT_EP_MASK \ + | B_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG_IN_EP_MASK) + /* In order to configure the USB PHY to use clk120 (ickusbcoreclk) as PLL * reference clock and Port2 as a USB device port, the following sequence must * be followed */ -static const struct reg_script init_script[] = { +static const struct reg_script ehci_init_script[] = { /* Set packet buffer OUT/IN thresholds */ REG_MMIO_RMW32(R_IOH_EHCI_INSNREG01, @@ -85,10 +91,31 @@ static const struct reg_script init_script[] = { REG_SCRIPT_END }; +static const struct reg_script usb_device_port_init_script[] = { + + /* Mask and clear controller interrupts */ + REG_MMIO_WRITE32(R_IOH_USBDEVICE_D_INTR_MSK_UDC_REG, + V_IOH_USBDEVICE_D_INTR_MSK_UDC_REG), + REG_MMIO_WRITE32(R_IOH_USBDEVICE_D_INTR_UDC_REG, + V_IOH_USBDEVICE_D_INTR_MSK_UDC_REG), + + /* Mask and clear end point interrupts */ + REG_MMIO_WRITE32(R_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG, + V_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG), + REG_MMIO_WRITE32(R_IOH_USBDEVICE_EP_INTR_UDC_REG, + V_IOH_USBDEVICE_EP_INTR_MSK_UDC_REG), + REG_SCRIPT_END +}; + static void init(device_t dev) { - printk(BIOS_INFO, "Initializing USB PLLs\n"); - reg_script_run_on_dev(dev, init_script); + if ((dev->path.pci.devfn & 7) == EHCI_FUNC) { + printk(BIOS_INFO, "Initializing USB PLLs\n"); + reg_script_run_on_dev(dev, ehci_init_script); + } else { + printk(BIOS_INFO, "Initializing USB device port\n"); + reg_script_run_on_dev(dev, usb_device_port_init_script); + } } static struct device_operations device_ops = { diff --git a/src/soc/intel/quark/include/soc/pci_devs.h b/src/soc/intel/quark/include/soc/pci_devs.h index 02e2c32be4..67d8d32feb 100644 --- a/src/soc/intel/quark/include/soc/pci_devs.h +++ b/src/soc/intel/quark/include/soc/pci_devs.h @@ -33,6 +33,9 @@ /* IO Fabric 1 */ #define SIO1_DEV 0x14 #define HSUART1_DEV SIO1_DEV +#define USB_DEV_PORT_FUNC 2 +#define EHCI_FUNC 3 +#define OHCI_FUNC 4 #define HSUART1_FUNC 5 /* IO Fabric 2 */ |