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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2013-06-07 01:55:57 +0200 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-06-12 05:29:07 +0200 |
| commit | fe50d0bcfe96210413d9c2372d3daa779892b520 (patch) | |
| tree | c45fd4e0f2b811a0f9d7a18ba919fa2ea52c8f97 /src | |
| parent | 7d1ebbff5ad224591a2d1972737611f96a13145c (diff) | |
| download | coreboot-fe50d0bcfe96210413d9c2372d3daa779892b520.tar.xz | |
Make acpi/ec.c usable in romstage
On X201 to enable EHCI debug you need to go through EC if USB power is
disabled so we need to inclue ec.c.
Change-Id: I8f8b7de639ecaebceaa53cd338136befaeec8214
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/3405
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/ec/acpi/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/ec/acpi/ec.c | 13 |
2 files changed, 14 insertions, 0 deletions
diff --git a/src/ec/acpi/Makefile.inc b/src/ec/acpi/Makefile.inc index 34c5136052..b39aaa2f94 100644 --- a/src/ec/acpi/Makefile.inc +++ b/src/ec/acpi/Makefile.inc @@ -1,2 +1,3 @@ ramstage-y += ec.c smm-$(CONFIG_HAVE_SMI_HANDLER) += ec.c +romstage-$(CONFIG_BOARD_LENOVO_X201) += ec.c diff --git a/src/ec/acpi/ec.c b/src/ec/acpi/ec.c index d3a6aaf679..ab287d6afd 100644 --- a/src/ec/acpi/ec.c +++ b/src/ec/acpi/ec.c @@ -25,9 +25,18 @@ #include <delay.h> #include "ec.h" +#ifdef __PRE_RAM__ + +static const int ec_cmd_reg = EC_SC; +static const int ec_data_reg = EC_DATA; + +#else + static int ec_cmd_reg = EC_SC; static int ec_data_reg = EC_DATA; +#endif + int send_ec_command(u8 command) { int timeout; @@ -132,12 +141,16 @@ void ec_clr_bit(u8 addr, u8 bit) ec_write(addr, ec_read(addr) & ~(1 << bit)); } +#ifndef __PRE_RAM__ + void ec_set_ports(u16 cmd_reg, u16 data_reg) { ec_cmd_reg = cmd_reg; ec_data_reg = data_reg; } +#endif + #if !defined(__SMM__) && !defined(__PRE_RAM__) struct chip_operations ec_acpi_ops = { CHIP_NAME("ACPI Embedded Controller") |