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authorNico Huber <nico.h@gmx.de>2020-03-08 18:36:00 +0100
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2020-03-10 11:52:45 +0000
commit0266be0d2bc8d667a705d2df433a0b6b19f614c5 (patch)
tree6a093d63566190fb516bb4fe50539de1d1e909a5 /src
parent8fb7cd4123a1e60b88b65ebb8e330835adae71e2 (diff)
downloadcoreboot-0266be0d2bc8d667a705d2df433a0b6b19f614c5.tar.xz
soc/intel/xeon-sp,mb/ocp/tiogapass: Don't fake binaries
If we don't pretend to have binaries, there is no need to add fake ones. This also fixes building the default config. Change-Id: I8f933f24a734a9ce3d82ef57f7f234ee4dfa86e9 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39383 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/drivers/intel/fsp2_0/Kconfig2
-rw-r--r--src/mainboard/ocp/tiogapass/Kconfig1
-rw-r--r--src/soc/intel/xeon_sp/Kconfig10
3 files changed, 2 insertions, 11 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 024a478eb6..2624644fae 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -56,7 +56,7 @@ config FSP_USE_REPO
depends on SOC_INTEL_APOLLOLAKE || SOC_INTEL_SKYLAKE || \
SOC_INTEL_KABYLAKE || SOC_INTEL_COFFEELAKE || \
SOC_INTEL_ICELAKE || SOC_INTEL_WHISKEYLAKE || \
- SOC_INTEL_DENVERTON_NS || SOC_INTEL_XEON_SP
+ SOC_INTEL_DENVERTON_NS
help
When selecting this option, the SoC must set FSP_HEADER_PATH
and FSP_FD_PATH correctly so FSP splitting works.
diff --git a/src/mainboard/ocp/tiogapass/Kconfig b/src/mainboard/ocp/tiogapass/Kconfig
index dfa8f54275..87e27600dd 100644
--- a/src/mainboard/ocp/tiogapass/Kconfig
+++ b/src/mainboard/ocp/tiogapass/Kconfig
@@ -19,7 +19,6 @@ if BOARD_OCP_TIOGAPASS
config BOARD_SPECIFIC_OPTIONS
def_bool y
- select ADD_FSP_BINARIES
select BOARD_ROMSIZE_KB_32768
select HAVE_ACPI_TABLES
select SOC_INTEL_XEON_SP
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
index 8c355c4582..94c0ac4a8d 100644
--- a/src/soc/intel/xeon_sp/Kconfig
+++ b/src/soc/intel/xeon_sp/Kconfig
@@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS
select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS
select FSP_T_XIP
select FSP_M_XIP
- select FSP_USE_REPO
select POSTCAR_STAGE
select IOAPIC
select PARALLEL_MP
@@ -55,6 +54,7 @@ config CPU_SPECIFIC_OPTIONS
select TSC_MONOTONIC_TIMER
select UDELAY_TSC
select SUPPORT_CPU_UCODE_IN_CBFS
+ select MICROCODE_BLOB_NOT_HOOKED_UP
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
config MAINBOARD_USES_FSP2_0
@@ -69,14 +69,6 @@ config USE_FSP2_0_DRIVER
select POSTCAR_CONSOLE
select POSTCAR_STAGE
-# Fake FSP binary is used, as the current FSP binary for SKX-SP
-# is an engineering build. It is not available to the public
-# for now.
-config FSP_FD_PATH
- string "Location of FSP binary"
- depends on FSP_USE_REPO
- default "3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
-
config FSP_HEADER_PATH
string "Location of FSP headers"
depends on MAINBOARD_USES_FSP2_0