mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'

List of changes:
1. Use devicetree.cb from default location
2. Create variant directory for ADL RVP with external EC as
'adlrvp_p_ext_ec'
3. Add initial overridetree.cb for 'adlrvp_p' and 'adlrvp_p_ext_ec'
to override 'devicetree.cb' as applicable.
4. Move all common files between 'adlrvp_p' and 'adlrvp_p_ext_ec'
to mainboard directory

TEST=Build and boot both ADLRVP with onboard and external EC.

Change-Id: I3591e214ed32dc9baaa49b92dff59579f29c7bd6
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47335
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

12 files changed, 17 insertions, 13 deletions

diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 2a3dbb021c..a41c18659d 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -32,7 +32,8 @@ config MAINBOARD_DIR
 
 config VARIANT_DIR
 	string
-	default "adlrvp_p"
+	default "adlrvp_p" if BOARD_INTEL_ADLRVP_P
+	default "adlrvp_p_ext_ec" if BOARD_INTEL_ADLRVP_P_EXT_EC
 
 config GBB_HWID
 	string
@@ -47,9 +48,9 @@ config MAINBOARD_FAMILY
 	string
 	default "Intel_adlrvp"
 
-config DEVICETREE
+config OVERRIDE_DEVICETREE
 	string
-	default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
 
 config DIMM_SPD_SIZE
 	int
diff --git a/src/mainboard/intel/adlrvp/Makefile.inc b/src/mainboard/intel/adlrvp/Makefile.inc
index 2ca32f3760..de924067d1 100644
--- a/src/mainboard/intel/adlrvp/Makefile.inc
+++ b/src/mainboard/intel/adlrvp/Makefile.inc
@@ -4,12 +4,14 @@ subdirs-y += spd
 
 bootblock-y += bootblock.c
 bootblock-$(CONFIG_CHROMEOS) += chromeos.c
+bootblock-y += early_gpio.c
 
 verstage-$(CONFIG_CHROMEOS) += chromeos.c
 
 romstage-$(CONFIG_CHROMEOS) += chromeos.c
 romstage-y += romstage_fsp_params.c
 romstage-y += board_id.c
+romstage-y += memory.c
 
 smm-y += smihandler.c
 
@@ -17,8 +19,8 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c
 ramstage-y += ec.c
 ramstage-y += mainboard.c
 ramstage-y += board_id.c
+ramstage-y += gpio.c
 
-subdirs-y += variants/baseboard
-CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
 
 subdirs-y += variants/$(VARIANT_DIR)
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index ce55fa3914..ce55fa3914 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_p/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p/early_gpio.c b/src/mainboard/intel/adlrvp/early_gpio.c
index d45bf8e067..d45bf8e067 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_p/early_gpio.c
+++ b/src/mainboard/intel/adlrvp/early_gpio.c
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c b/src/mainboard/intel/adlrvp/gpio.c
index f91b94faf4..f91b94faf4 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c
+++ b/src/mainboard/intel/adlrvp/gpio.c
diff --git a/src/mainboard/intel/adlrvp/variants/baseboard/include/baseboard/ec.h b/src/mainboard/intel/adlrvp/include/baseboard/ec.h
index 4303faf0d2..4303faf0d2 100644
--- a/src/mainboard/intel/adlrvp/variants/baseboard/include/baseboard/ec.h
+++ b/src/mainboard/intel/adlrvp/include/baseboard/ec.h
diff --git a/src/mainboard/intel/adlrvp/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/intel/adlrvp/include/baseboard/gpio.h
index b61276c0c1..b61276c0c1 100644
--- a/src/mainboard/intel/adlrvp/variants/baseboard/include/baseboard/gpio.h
+++ b/src/mainboard/intel/adlrvp/include/baseboard/gpio.h
diff --git a/src/mainboard/intel/adlrvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/adlrvp/include/baseboard/variants.h
index 537e62451a..537e62451a 100644
--- a/src/mainboard/intel/adlrvp/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/intel/adlrvp/include/baseboard/variants.h
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p/memory.c b/src/mainboard/intel/adlrvp/memory.c
index ec7ae88135..d51caf783a 100644
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_p/memory.c
+++ b/src/mainboard/intel/adlrvp/memory.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <arch/cpu.h>
-#include "../../board_id.h"
+#include "board_id.h"
 #include <baseboard/variants.h>
 #include <soc/romstage.h>
 
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p/Makefile.inc b/src/mainboard/intel/adlrvp/variants/adlrvp_p/Makefile.inc
deleted file mode 100644
index 513963ebd5..0000000000
--- a/src/mainboard/intel/adlrvp/variants/adlrvp_p/Makefile.inc
+++ /dev/null
@@ -1,7 +0,0 @@
-## SPDX-License-Identifier: GPL-2.0-only
-
-bootblock-y += early_gpio.c
-
-romstage-y += memory.c
-
-ramstage-y += gpio.c
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p/overridetree.cb
new file mode 100644
index 0000000000..e58e9fbdce
--- /dev/null
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p/overridetree.cb
@@ -0,0 +1,4 @@
+chip soc/intel/alderlake
+
+	device domain 0 on end
+end
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
new file mode 100644
index 0000000000..e58e9fbdce
--- /dev/null
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
@@ -0,0 +1,4 @@
+chip soc/intel/alderlake
+
+	device domain 0 on end
+end