diff options
| author | Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> | 2020-03-10 15:40:42 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-12 07:38:50 +0000 |
| commit | 18129f919ac637e7b728ec7e4d1eb797eb3b465b (patch) | |
| tree | c075fc0cf36640f96b814083239a24fc50a944c6 /src | |
| parent | 6f785b0f62a672c9211ef545bd307abdcc1fe7b9 (diff) | |
| download | coreboot-18129f919ac637e7b728ec7e4d1eb797eb3b465b.tar.xz | |
soc/intel/tigerlake: Enable HDA through dev_enabled
Check for dev enabled status for HDA controller and
update the UPD accordingly.
BUG=151174264
BRANCH=none
TEST=Build and boot tglrvp
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: Id5dfff275ed9906852ef7eb7461fbe89a3a115c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39441
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/tigerlake/romstage/fsp_params_tgl.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c index f0f3b4cadd..4b9b007eb6 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c @@ -28,6 +28,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, { unsigned int i; uint32_t mask = 0; + const struct device *dev; /* Set IGD stolen size to 60MB. */ m_cfg->IgdDvmt50PreAlloc = 0xFE; @@ -70,7 +71,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, * Skip IGD initialization in FSP if device * is disable in devicetree.cb. */ - const struct device *dev = pcidev_path_on_root(SA_DEVFN_IGD); + dev = pcidev_path_on_root(SA_DEVFN_IGD); if (!dev || !dev->enabled) m_cfg->InternalGfx = 0; else @@ -113,6 +114,12 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_TIGERLAKE_DEBUG_CONSENT; /* Audio: HDAUDIO_LINK_MODE I2S/SNDW */ + dev = pcidev_path_on_root(PCH_DEVFN_HDA); + if (!dev) + m_cfg->PchHdaEnable = 0; + else + m_cfg->PchHdaEnable = dev->enabled; + m_cfg->PchHdaDspEnable = config->PchHdaDspEnable; m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable; memcpy(m_cfg->PchHdaAudioLinkDmicEnable, config->PchHdaAudioLinkDmicEnable, |