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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-04 12:58:53 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-06 04:30:40 +0000
commit287910765d59441b325f97880f9ce584623ad009 (patch)
treeb3cb6164558d356d09a733f4601f40fcba9e86fa /src
parent19be7b569e5d0162c76774c33f86472eea0e6f5d (diff)
downloadcoreboot-287910765d59441b325f97880f9ce584623ad009.tar.xz
drivers/pc80/rtc: Swap cmos_write32() parameter order
Make it consistent with the more used cmos_write(). Change-Id: I9cf643c770e9819de08dbede48b73f3d4fe15bd7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38178 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/console/post.c8
-rw-r--r--src/include/pc80/mc146818rtc.h2
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c4
3 files changed, 7 insertions, 7 deletions
diff --git a/src/console/post.c b/src/console/post.c
index a426fccac2..9d535cb4e5 100644
--- a/src/console/post.c
+++ b/src/console/post.c
@@ -98,8 +98,8 @@ void cmos_post_init(void)
cmos_write(0, CMOS_POST_BANK_0_OFFSET);
cmos_write(0, CMOS_POST_BANK_1_OFFSET);
#if CONFIG(CMOS_POST_EXTRA)
- cmos_write32(CMOS_POST_BANK_0_EXTRA, 0);
- cmos_write32(CMOS_POST_BANK_1_EXTRA, 0);
+ cmos_write32(0, CMOS_POST_BANK_0_EXTRA);
+ cmos_write32(0, CMOS_POST_BANK_1_EXTRA);
#endif
}
@@ -113,10 +113,10 @@ void post_log_extra(u32 value)
switch (cmos_read(CMOS_POST_BANK_OFFSET)) {
case CMOS_POST_BANK_0_MAGIC:
- cmos_write32(CMOS_POST_BANK_0_EXTRA, value);
+ cmos_write32(value, CMOS_POST_BANK_0_EXTRA);
break;
case CMOS_POST_BANK_1_MAGIC:
- cmos_write32(CMOS_POST_BANK_1_EXTRA, value);
+ cmos_write32(value, CMOS_POST_BANK_1_EXTRA);
break;
}
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h
index aa50773750..a8221c7259 100644
--- a/src/include/pc80/mc146818rtc.h
+++ b/src/include/pc80/mc146818rtc.h
@@ -171,7 +171,7 @@ static inline u32 cmos_read32(u8 offset)
return value;
}
-static inline void cmos_write32(u8 offset, u32 value)
+static inline void cmos_write32(u32 value, u8 offset)
{
u8 i;
for (i = 0; i < sizeof(value); ++i)
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index aa166c9d73..959ea4128d 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -66,11 +66,11 @@ void save_mrc_data(struct pei_data *pei_data)
pei_data->mrc_output_len);
/* Save the MRC seed values to CMOS */
- cmos_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed);
+ cmos_write32(pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED);
printk(BIOS_DEBUG, "Save scrambler seed 0x%08x to CMOS 0x%02x\n",
pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED);
- cmos_write32(CMOS_OFFSET_MRC_SEED_S3, pei_data->scrambler_seed_s3);
+ cmos_write32(pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3);
printk(BIOS_DEBUG, "Save s3 scrambler seed 0x%08x to CMOS 0x%02x\n",
pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3);