diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-06-02 14:52:25 +0300 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-04 08:45:38 +0000 |
commit | 2d7825b0fce070f41ef35b7fdcf599550663dbe9 (patch) | |
tree | ff063eb4778b7640bb0669cd31758c16dc8ada04 /src | |
parent | 975da840d094489da35c2770eab7afe4ef769be8 (diff) | |
download | coreboot-2d7825b0fce070f41ef35b7fdcf599550663dbe9.tar.xz |
amdfam10: Fix mismatch of function declarations
Callsite declared returning int, which makes more sense
than u8 the motherboard side code defined the functions
with.
Change-Id: I8ee83aa2833408ad163c9011a076e08578f3ca6f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/advansus/a785e-i/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/amd/bimini_fam10/mainboard.c | 5 | ||||
-rw-r--r-- | src/mainboard/amd/mahogany_fam10/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/amd/tilapia_fam10/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/asus/m4a78-em/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/asus/m4a785-m/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/asus/m5a88-v/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/avalue/eax-785e/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/gigabyte/ma785gm/mainboard.c | 2 | ||||
-rw-r--r-- | src/mainboard/gigabyte/ma785gmt/mainboard.c | 2 | ||||
-rw-r--r-- | src/mainboard/gigabyte/ma78gm/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/iei/kino-780am2-fam10/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/jetway/pa78vm5/mainboard.c | 4 | ||||
-rw-r--r-- | src/mainboard/supermicro/h8scm_fam10/mainboard.c | 7 | ||||
-rw-r--r-- | src/southbridge/amd/rs780/gfx.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/rs780/rs780.h | 1 |
16 files changed, 26 insertions, 33 deletions
diff --git a/src/mainboard/advansus/a785e-i/mainboard.c b/src/mainboard/advansus/a785e-i/mainboard.c index 33cbf8891e..b5a2ea82db 100644 --- a/src/mainboard/advansus/a785e-i/mainboard.c +++ b/src/mainboard/advansus/a785e-i/mainboard.c @@ -21,8 +21,8 @@ #include <cpu/amd/mtrr.h> #include <southbridge/amd/common/amd_defs.h> #include <device/pci_def.h> +#include "southbridge/amd/rs780/rs780.h" -u8 is_dev3_present(void); void set_pcie_dereset(void); void set_pcie_reset(void); @@ -53,7 +53,7 @@ void set_pcie_reset(void) { } -u8 is_dev3_present(void) +int is_dev3_present(void) { return 0; } diff --git a/src/mainboard/amd/bimini_fam10/mainboard.c b/src/mainboard/amd/bimini_fam10/mainboard.c index 78529be48d..b6347ebc37 100644 --- a/src/mainboard/amd/bimini_fam10/mainboard.c +++ b/src/mainboard/amd/bimini_fam10/mainboard.c @@ -22,9 +22,8 @@ #include <device/pci_def.h> #include <southbridge/amd/common/amd_defs.h> #include <southbridge/amd/sb800/sb800.h> +#include "southbridge/amd/rs780/rs780.h" - -u8 is_dev3_present(void); void set_pcie_dereset(void); void set_pcie_reset(void); @@ -70,7 +69,7 @@ void set_pcie_reset(void) /* GPIO 50h reset PCIe slot */ } -u8 is_dev3_present(void) +int is_dev3_present(void) { return 0; } diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c index a327284566..53a8290685 100644 --- a/src/mainboard/amd/mahogany_fam10/mainboard.c +++ b/src/mainboard/amd/mahogany_fam10/mainboard.c @@ -22,10 +22,10 @@ #include <device/pci_def.h> #include "southbridge/amd/sb700/sb700.h" #include "southbridge/amd/sb700/smbus.h" +#include "southbridge/amd/rs780/rs780.h" void set_pcie_dereset(void); void set_pcie_reset(void); -u8 is_dev3_present(void); /* * Mahogany uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to * pull it up before training the slot. @@ -85,7 +85,7 @@ static void get_ide_dma66(void) } #endif /* get_ide_dma66() */ -u8 is_dev3_present(void) +int is_dev3_present(void) { return 0; } diff --git a/src/mainboard/amd/tilapia_fam10/mainboard.c b/src/mainboard/amd/tilapia_fam10/mainboard.c index 28522a7fbd..e8a08a53c1 100644 --- a/src/mainboard/amd/tilapia_fam10/mainboard.c +++ b/src/mainboard/amd/tilapia_fam10/mainboard.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include <southbridge/amd/sb700/sb700.h> #include "southbridge/amd/sb700/smbus.h" +#include "southbridge/amd/rs780/rs780.h" #define ADT7461_ADDRESS 0x4C #define ARA_ADDRESS 0x0C /* Alert Response Address */ @@ -35,7 +36,6 @@ void set_pcie_dereset(void); void set_pcie_reset(void); -u8 is_dev3_present(void); void set_pcie_dereset() { @@ -91,7 +91,7 @@ void set_pcie_reset() /* * justify the dev3 is exist or not */ -u8 is_dev3_present(void) +int is_dev3_present(void) { u16 word; struct device *sm_dev; diff --git a/src/mainboard/asus/m4a78-em/mainboard.c b/src/mainboard/asus/m4a78-em/mainboard.c index 99a1cf6e3b..e80d39b0e8 100644 --- a/src/mainboard/asus/m4a78-em/mainboard.c +++ b/src/mainboard/asus/m4a78-em/mainboard.c @@ -22,11 +22,11 @@ #include <device/pci_def.h> #include "southbridge/amd/sb700/sb700.h" #include "southbridge/amd/sb700/smbus.h" +#include "southbridge/amd/rs780/rs780.h" void set_pcie_dereset(void); void set_pcie_reset(void); -u8 is_dev3_present(void); void set_pcie_dereset() { @@ -84,7 +84,7 @@ void set_pcie_reset() * NOTE: This just copied from AMD Tilapia code. * It is completly unknown if it will work at all for this board. */ -u8 is_dev3_present(void) +int is_dev3_present(void) { u16 word; struct device *sm_dev; diff --git a/src/mainboard/asus/m4a785-m/mainboard.c b/src/mainboard/asus/m4a785-m/mainboard.c index 4f4bb9dc78..42a9f644e3 100644 --- a/src/mainboard/asus/m4a785-m/mainboard.c +++ b/src/mainboard/asus/m4a785-m/mainboard.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include "southbridge/amd/sb700/sb700.h" #include "southbridge/amd/sb700/smbus.h" +#include "southbridge/amd/rs780/rs780.h" #define ADT7461_ADDRESS 0x4C #define ARA_ADDRESS 0x0C /* Alert Response Address */ @@ -35,7 +36,6 @@ void set_pcie_dereset(void); void set_pcie_reset(void); -u8 is_dev3_present(void); void set_pcie_dereset() { @@ -93,7 +93,7 @@ void set_pcie_reset() * NOTE: This just copied from AMD Tilapia code. * It is completly unknown it it will work at all for ASUS M4A785-M. */ -u8 is_dev3_present(void) +int is_dev3_present(void) { u16 word; struct device *sm_dev; diff --git a/src/mainboard/asus/m5a88-v/mainboard.c b/src/mainboard/asus/m5a88-v/mainboard.c index 8af6037e7d..4ec716e96a 100644 --- a/src/mainboard/asus/m5a88-v/mainboard.c +++ b/src/mainboard/asus/m5a88-v/mainboard.c @@ -21,8 +21,8 @@ #include <cpu/amd/mtrr.h> #include <southbridge/amd/common/amd_defs.h> #include <device/pci_def.h> +#include "southbridge/amd/rs780/rs780.h" -u8 is_dev3_present(void); void set_pcie_dereset(void); void set_pcie_reset(void); @@ -53,7 +53,7 @@ void set_pcie_reset(void) { } -u8 is_dev3_present(void) +int is_dev3_present(void) { return 0; } diff --git a/src/mainboard/avalue/eax-785e/mainboard.c b/src/mainboard/avalue/eax-785e/mainboard.c index b820b985bf..4d2f0ff42d 100644 --- a/src/mainboard/avalue/eax-785e/mainboard.c +++ b/src/mainboard/avalue/eax-785e/mainboard.c @@ -21,8 +21,8 @@ #include <cpu/amd/mtrr.h> #include <southbridge/amd/common/amd_defs.h> #include <device/pci_def.h> +#include "southbridge/amd/rs780/rs780.h" -u8 is_dev3_present(void); void set_pcie_dereset(void); void set_pcie_reset(void); @@ -53,7 +53,7 @@ void set_pcie_reset(void) { } -u8 is_dev3_present(void) +int is_dev3_present(void) { return 1; } diff --git a/src/mainboard/gigabyte/ma785gm/mainboard.c b/src/mainboard/gigabyte/ma785gm/mainboard.c index a95686c797..37a3828f94 100644 --- a/src/mainboard/gigabyte/ma785gm/mainboard.c +++ b/src/mainboard/gigabyte/ma785gm/mainboard.c @@ -22,10 +22,10 @@ #include <device/pci_def.h> #include "southbridge/amd/sb700/sb700.h" #include "southbridge/amd/sb700/smbus.h" +#include "southbridge/amd/rs780/rs780.h" void set_pcie_dereset(void); void set_pcie_reset(void); -int is_dev3_present(void); void set_pcie_dereset() { diff --git a/src/mainboard/gigabyte/ma785gmt/mainboard.c b/src/mainboard/gigabyte/ma785gmt/mainboard.c index acc88fddda..ce186bf587 100644 --- a/src/mainboard/gigabyte/ma785gmt/mainboard.c +++ b/src/mainboard/gigabyte/ma785gmt/mainboard.c @@ -22,6 +22,7 @@ #include <device/pci_def.h> #include "southbridge/amd/sb700/sb700.h" #include "southbridge/amd/sb700/smbus.h" +#include "southbridge/amd/rs780/rs780.h" #define ADT7461_ADDRESS 0x4C #define ARA_ADDRESS 0x0C /* Alert Response Address */ @@ -35,7 +36,6 @@ void set_pcie_dereset(void); void set_pcie_reset(void); -int is_dev3_present(void); void set_pcie_dereset() { diff --git a/src/mainboard/gigabyte/ma78gm/mainboard.c b/src/mainboard/gigabyte/ma78gm/mainboard.c index cdfefbb6ee..3e73f229e9 100644 --- a/src/mainboard/gigabyte/ma78gm/mainboard.c +++ b/src/mainboard/gigabyte/ma78gm/mainboard.c @@ -23,10 +23,10 @@ #include <device/pci_def.h> #include "southbridge/amd/sb700/sb700.h" #include "southbridge/amd/sb700/smbus.h" +#include "southbridge/amd/rs780/rs780.h" void set_pcie_dereset(void); void set_pcie_reset(void); -u8 is_dev3_present(void); /* * ma78gm-us2h uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to * pull it up before training the slot. @@ -58,7 +58,7 @@ void set_pcie_reset() } -u8 is_dev3_present(void) +int is_dev3_present(void) { return 0; } diff --git a/src/mainboard/iei/kino-780am2-fam10/mainboard.c b/src/mainboard/iei/kino-780am2-fam10/mainboard.c index c94a691f0f..f75bec2f9f 100644 --- a/src/mainboard/iei/kino-780am2-fam10/mainboard.c +++ b/src/mainboard/iei/kino-780am2-fam10/mainboard.c @@ -22,10 +22,10 @@ #include <device/pci_def.h> #include "southbridge/amd/sb700/sb700.h" #include "southbridge/amd/sb700/smbus.h" +#include "southbridge/amd/rs780/rs780.h" void set_pcie_dereset(void); void set_pcie_reset(void); -u8 is_dev3_present(void); /* TODO - Need to find GPIO for PCIE slot. * Kino uses GPIO ? as PCIe slot reset, GPIO? as GFX slot reset. We need to * pull it up before training the slot. @@ -40,7 +40,7 @@ void set_pcie_reset() /* PCIE slot not yet supported.*/ } -u8 is_dev3_present(void) +int is_dev3_present(void) { return 0; } diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c index ab305e3378..906b070569 100644 --- a/src/mainboard/jetway/pa78vm5/mainboard.c +++ b/src/mainboard/jetway/pa78vm5/mainboard.c @@ -23,10 +23,10 @@ #include <device/pci_def.h> #include "southbridge/amd/sb700/sb700.h" #include "southbridge/amd/sb700/smbus.h" +#include "southbridge/amd/rs780/rs780.h" void set_pcie_dereset(void); void set_pcie_reset(void); -u8 is_dev3_present(void); /* * the board uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to @@ -87,7 +87,7 @@ static void get_ide_dma66(void) } #endif /* get_ide_dma66() */ -u8 is_dev3_present(void) +int is_dev3_present(void) { return 0; } diff --git a/src/mainboard/supermicro/h8scm_fam10/mainboard.c b/src/mainboard/supermicro/h8scm_fam10/mainboard.c index 092f2e8c2d..afce33db21 100644 --- a/src/mainboard/supermicro/h8scm_fam10/mainboard.c +++ b/src/mainboard/supermicro/h8scm_fam10/mainboard.c @@ -26,13 +26,6 @@ void set_pcie_reset(void); void set_pcie_dereset(void); -u8 is_dev3_present(void); - -/* 780 board use this function*/ -u8 is_dev3_present(void) -{ - return 0; -} /* * TODO: Add the routine info of each PCIE_RESET_L. diff --git a/src/southbridge/amd/rs780/gfx.c b/src/southbridge/amd/rs780/gfx.c index 79a9db7782..3152a14eb1 100644 --- a/src/southbridge/amd/rs780/gfx.c +++ b/src/southbridge/amd/rs780/gfx.c @@ -35,7 +35,7 @@ #include <delay.h> #include <cpu/x86/msr.h> #include "rs780.h" -extern int is_dev3_present(void); + void set_pcie_reset(void); void set_pcie_dereset(void); diff --git a/src/southbridge/amd/rs780/rs780.h b/src/southbridge/amd/rs780/rs780.h index 971637b285..a8bbbe2231 100644 --- a/src/southbridge/amd/rs780/rs780.h +++ b/src/southbridge/amd/rs780/rs780.h @@ -222,5 +222,6 @@ int is_family10h(void); void enable_rs780_dev8(void); void rs780_early_setup(void); void rs780_htinit(void); +int is_dev3_present(void); #endif /* __RS780_H__ */ |