diff options
author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-06-06 14:03:22 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-07 11:08:48 +0000 |
commit | 362a73409103ae076172ea58f3f1c1a8fbdc6b00 (patch) | |
tree | 3b20e392bbbc3fcea1e18bcaf71988ac38ef55e3 /src | |
parent | 4c8d4872a56ea99feb3397619927db360b2f6339 (diff) | |
download | coreboot-362a73409103ae076172ea58f3f1c1a8fbdc6b00.tar.xz |
mediatek: Move uart, timer and cbmem code to a common directory.
This patch moves uart, timer and cbmem code which can be reused into a
common directory under soc/mediatek.
BUG=b:80501386
BRANCH=none
TEST=the refactored code works fine on the new platform (with the rest
of the patches applied) and Elm platform
Change-Id: I5210149b324947ee90f1a481b42f0e2e1f7cfc25
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/26658
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/mediatek/common/cbmem.c (renamed from src/soc/mediatek/mt8173/cbmem.c) | 2 | ||||
-rw-r--r-- | src/soc/mediatek/common/include/soc/timer.h (renamed from src/soc/mediatek/mt8173/include/soc/timer.h) | 2 | ||||
-rw-r--r-- | src/soc/mediatek/common/timer.c (renamed from src/soc/mediatek/mt8173/common_timer.c) | 0 | ||||
-rw-r--r-- | src/soc/mediatek/common/uart.c (renamed from src/soc/mediatek/mt8173/uart.c) | 2 | ||||
-rw-r--r-- | src/soc/mediatek/mt8173/Makefile.inc | 21 |
5 files changed, 14 insertions, 13 deletions
diff --git a/src/soc/mediatek/mt8173/cbmem.c b/src/soc/mediatek/common/cbmem.c index 31ea1baef4..8906565bd5 100644 --- a/src/soc/mediatek/mt8173/cbmem.c +++ b/src/soc/mediatek/common/cbmem.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright 2015 MediaTek Inc. + * Copyright 2018 MediaTek Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/soc/mediatek/mt8173/include/soc/timer.h b/src/soc/mediatek/common/include/soc/timer.h index e876971d06..babcbba561 100644 --- a/src/soc/mediatek/mt8173/include/soc/timer.h +++ b/src/soc/mediatek/common/include/soc/timer.h @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright 2015 MediaTek Inc. + * Copyright 2018 MediaTek Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/soc/mediatek/mt8173/common_timer.c b/src/soc/mediatek/common/timer.c index 6e4315c7cf..6e4315c7cf 100644 --- a/src/soc/mediatek/mt8173/common_timer.c +++ b/src/soc/mediatek/common/timer.c diff --git a/src/soc/mediatek/mt8173/uart.c b/src/soc/mediatek/common/uart.c index 961e3eb9be..cfc469bed6 100644 --- a/src/soc/mediatek/mt8173/uart.c +++ b/src/soc/mediatek/common/uart.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright 2015 MediaTek Inc. + * Copyright 2018 MediaTek Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc index 3aa463a928..3bb0ae0b31 100644 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -20,11 +20,11 @@ bootblock-$(CONFIG_SPI_FLASH) += flash_controller.c bootblock-y += i2c.c bootblock-y += pll.c bootblock-y += spi.c -bootblock-y += common_timer.c +bootblock-y += ../common/timer.c bootblock-y += timer.c ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) -bootblock-$(CONFIG_DRIVERS_UART) += uart.c +bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c endif bootblock-y += gpio.c gpio_init.c pmic_wrap.c mt6391.c @@ -36,9 +36,9 @@ bootblock-y += mmu_operations.c verstage-y += i2c.c verstage-y += spi.c -verstage-$(CONFIG_DRIVERS_UART) += uart.c +verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c -verstage-y += common_timer.c +verstage-y += ../common/timer.c verstage-y += timer.c verstage-y += wdt.c verstage-$(CONFIG_SPI_FLASH) += flash_controller.c @@ -48,11 +48,11 @@ verstage-y += gpio.c romstage-$(CONFIG_SPI_FLASH) += flash_controller.c romstage-y += pll.c -romstage-y += common_timer.c +romstage-y += ../common/timer.c romstage-y += timer.c -romstage-$(CONFIG_DRIVERS_UART) += uart.c -romstage-y += cbmem.c +romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c +romstage-y += ../common/cbmem.c romstage-y += spi.c romstage-y += gpio.c romstage-y += pmic_wrap.c mt6391.c @@ -63,13 +63,13 @@ romstage-y += rtc.c ################################################################################ -ramstage-y += cbmem.c emi.c +ramstage-y += ../common/cbmem.c emi.c ramstage-y += spi.c ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c ramstage-y += soc.c mtcmos.c -ramstage-y += common_timer.c +ramstage-y += ../common/timer.c ramstage-y += timer.c -ramstage-$(CONFIG_DRIVERS_UART) += uart.c +ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c ramstage-y += pmic_wrap.c mt6391.c i2c.c ramstage-y += mt6311.c ramstage-y += da9212.c @@ -94,5 +94,6 @@ $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin ./util/mtkheader/gen-bl-img.py mt8173 sf $< $@ CPPFLAGS_common += -Isrc/soc/mediatek/mt8173/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/include endif |