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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-04-21 21:26:58 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2011-04-21 21:26:58 +0000 |
| commit | 3e4fb9d1a12c6a4b69702badc7223fec3b6e8ddb (patch) | |
| tree | 31e60c2235aa41d0092878e762c749172e6a527f /src | |
| parent | d4814bd41c080fb9dda87c762fcaecf4e72fc996 (diff) | |
| download | coreboot-3e4fb9d1a12c6a4b69702badc7223fec3b6e8ddb.tar.xz | |
more ifdef -> if fixes.
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6537 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/Kconfig | 8 | ||||
| -rw-r--r-- | src/boot/selfboot.c | 4 | ||||
| -rw-r--r-- | src/cpu/amd/model_gx2/syspreinit.c | 2 | ||||
| -rw-r--r-- | src/cpu/amd/model_lx/syspreinit.c | 2 | ||||
| -rw-r--r-- | src/southbridge/amd/rs780/early_setup.c | 4 |
5 files changed, 12 insertions, 8 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index a903827c11..f98cf5bd54 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -91,4 +91,12 @@ config CMOS_DEFAULT_FILE config BOOTBLOCK_SOUTHBRIDGE_INIT string +config BIG_ENDIAN + bool + default n + +config LITTLE_ENDIAN + bool + default !BIG_ENDIAN + endmenu diff --git a/src/boot/selfboot.c b/src/boot/selfboot.c index f8be72c77c..5f7a8f11f5 100644 --- a/src/boot/selfboot.c +++ b/src/boot/selfboot.c @@ -30,7 +30,7 @@ #include <cbfs.h> #include <lib.h> -#ifndef CONFIG_BIG_ENDIAN +#if !CONFIG_BIG_ENDIAN #define ntohl(x) ( ((x&0xff)<<24) | ((x&0xff00)<<8) | \ ((x&0xff0000) >> 8) | ((x&0xff000000) >> 24) ) #else @@ -477,7 +477,7 @@ static int load_self_segments( return 0; break; } -#if CONFIG_COMPRESSED_PAYLOAD_NRV2B==1 +#if CONFIG_COMPRESSED_PAYLOAD_NRV2B case CBFS_COMPRESS_NRV2B: { printk(BIOS_DEBUG, "using NRV2B\n"); unsigned long unrv2b(u8 *src, u8 *dst, unsigned long *ilen_p); diff --git a/src/cpu/amd/model_gx2/syspreinit.c b/src/cpu/amd/model_gx2/syspreinit.c index bfec739312..814034823c 100644 --- a/src/cpu/amd/model_gx2/syspreinit.c +++ b/src/cpu/amd/model_gx2/syspreinit.c @@ -13,7 +13,7 @@ static void StartTimer1(void) void SystemPreInit(void) { /* they want a jump ... */ -#ifndef CONFIG_CACHE_AS_RAM +#if !CONFIG_CACHE_AS_RAM __asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n"); #endif StartTimer1(); diff --git a/src/cpu/amd/model_lx/syspreinit.c b/src/cpu/amd/model_lx/syspreinit.c index 0d80cba69d..35c54fba5f 100644 --- a/src/cpu/amd/model_lx/syspreinit.c +++ b/src/cpu/amd/model_lx/syspreinit.c @@ -39,7 +39,7 @@ void SystemPreInit(void) { /* they want a jump ... */ -#ifndef CONFIG_CACHE_AS_RAM +#if !CONFIG_CACHE_AS_RAM __asm__ __volatile__("jmp .+2\ninvd\njmp .+2\n"); #endif StartTimer1(); diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c index a93ba83172..b9d9a3104e 100644 --- a/src/southbridge/amd/rs780/early_setup.c +++ b/src/southbridge/amd/rs780/early_setup.c @@ -17,10 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef CONFIG_NORTHBRIDGE_AMD_AMDFAM10 -#define CONFIG_NORTHBRIDGE_AMD_AMDFAM10 0 -#endif - #include "rev.h" #define NBHTIU_INDEX 0x94 /* Note: It is different with RS690, whose HTIU index is 0xA8 */ |