This change allows us to see the spd on the s850, finally.

There is an i2c mux out there. We found it using a user level program 
that, as usual, began by inverting all gpios until we found out 
what we needed to know. In the end, we just set up the GPIOs as 
the factory bios does. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

3 files changed, 30 insertions, 22 deletions

diff --git a/src/mainboard/dell/s1850/auto.c b/src/mainboard/dell/s1850/auto.c
index f1d2c65592..4f61a45500 100644
--- a/src/mainboard/dell/s1850/auto.c
+++ b/src/mainboard/dell/s1850/auto.c
@@ -65,25 +65,6 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl)
 }
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
-	/* fake it out for this board */
-	switch(device) {
-		case 0x52:
-		case 0x53:
-			print_debug("FAKE");
-			device = 0x50;	
-			break;
-		case 0x50:
-		case 0x51:
-		case 0x54:
-		case 0x55:
-		case 0x56:
-		case 0x57:
-			print_debug("57");
-			device = 0x57;
-			break;
-		default: 
-			die("BAD DEV IN spd_read_byte");
-	}
 	return smbus_read_byte(device, address);
 }
 
@@ -278,12 +259,17 @@ static void main(unsigned long bist)
 	w = inw(0x866);
 	outw(w|2, 0x866);
 
+#if 0 
+	/*seriaice shows
+	dell does this so leave it here so I don't forget 
+ 	 */
 	/* SMBUS */
 	pci_write_config16(PCI_DEV(0, 0x1f, 3), 0x20, 0x08c0);
 
 	/* unknown */
 	b = inb(0x8c2);
 	outb(0xdf, 0x8c2);
+#endif
 
 	/* another device enable? */
 	b = pci_read_config8(PCI_DEV(0, 0, 0), 0xf4);
@@ -314,11 +300,12 @@ static void main(unsigned long bist)
 	uart_init();
 	console_init();
 
+
 	/* stuff we seem to need */
-	pc8374_enable_dev(PC8374_KBCK, 0);
+	pc8374_enable_dev(PNP_DEV(0x2e, PC8374_KBCK), 0);
 
 	/* GPIOs */
-	pc8374_enable_dev(PC8374_GPIO, 0xc20);
+	pc8374_enable_dev(PNP_DEV(0x2e, PC8374_GPIO), 0xc20);
 
 	/* keep this in mind.
 	SerialICE-hlp: outb 002e <= 23
@@ -351,7 +338,7 @@ static void main(unsigned long bist)
 #if 1
 	enable_smbus();
 #endif
-#if 0
+#if 1
 //	dump_spd_registers(&cpu[0]);
 	int i;
 	for(i = 0; i < 1; i++) {
diff --git a/src/mainboard/dell/s1850/s1850_fixups.c b/src/mainboard/dell/s1850/s1850_fixups.c
index 77744d4d34..9827120056 100644
--- a/src/mainboard/dell/s1850/s1850_fixups.c
+++ b/src/mainboard/dell/s1850/s1850_fixups.c
@@ -33,6 +33,26 @@ static void mainboard_set_ich5(void)
 	 * we leave it enabled and visible in config space -- 8f66
 	 */
 	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xf2, 0x8f66);
+	/* GPIOs -- needed, possibly, for SPD */
+	pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x58, 0x881);
+	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x5c, 0x10);
+
+	/* now the fun begins ... enable the GPIOs as done on factory */
+	/* factory config from IO ports 
+	 * It has a few more things enabled than default!
+	 */
+	outl(0x1ae0f183, 0x880);
+	outl(0x1b00ffff, 0x884);
+	outl(0x131f0000, 0x88c);
+	outl(0x00000000, 0x894);
+	outl(0x00040000, 0x898);
+	outl(0x00000000, 0x8a4);
+	outl(0x00000000, 0x8a8);
+	outl(0x000031c0, 0x8ac);
+	outl(0x00000007, 0x8b0);
+	outl(0x00000304, 0x8b4);
+	outl(0x00030303, 0x8b8);
+
 }
 
 
diff --git a/src/southbridge/intel/i82801er/i82801er_early_smbus.c b/src/southbridge/intel/i82801er/i82801er_early_smbus.c
index 3e051a2cab..42a55680af 100644
--- a/src/southbridge/intel/i82801er/i82801er_early_smbus.c
+++ b/src/southbridge/intel/i82801er/i82801er_early_smbus.c
@@ -9,6 +9,7 @@ static void enable_smbus(void)
 	print_spew("SMBus controller enabled\r\n");
 
 	pci_write_config32(dev, 0x20, SMBUS_IO_BASE | 1);
+	print_debug_hex32(pci_read_config32(dev, 0x20));
 	/* Set smbus enable */
 	pci_write_config8(dev, 0x40, 1);
 	/* Set smbus iospace enable */