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| author | Furquan Shaikh <furquan@google.com> | 2020-06-03 16:22:20 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-06-05 14:08:06 +0000 |
| commit | 466374924ccfc3c1306ca030b62d1de5ba3a1fba (patch) | |
| tree | ed3b87d66fe8a0efbef1b75d9753419ea239c4ff /src | |
| parent | 1929b571ce0a00edde8250d7794a3fbfaa7a9309 (diff) | |
| download | coreboot-466374924ccfc3c1306ca030b62d1de5ba3a1fba.tar.xz | |
soc/amd/picasso: Add set_mmio_dev_ops() to set ops for MMIO devices
This change adds a helper function set_mmio_dev_ops() in chip.c which
is used for setting the dev->ops for MMIO devices based on the
comparison of MMIO address in device tree to the pre-defined base
addresses in iomap.h.
Call to i2c_acpi_name() is replaced with set_mmio_dev_ops and scope of
i2c_acpi_name is restricted to i2c.c since it is not required to be
exposed out of that file.
Change-Id: I31f96cfe8267b0df37012baeb7cfcaec9c2280f6
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42067
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/picasso/chip.c | 16 | ||||
| -rw-r--r-- | src/soc/amd/picasso/i2c.c | 5 |
2 files changed, 14 insertions, 7 deletions
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c index dc661d2be3..ed39b53549 100644 --- a/src/soc/amd/picasso/chip.c +++ b/src/soc/amd/picasso/chip.c @@ -8,6 +8,7 @@ #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/data_fabric.h> +#include <soc/iomap.h> #include <soc/pci_devs.h> #include <soc/southbridge.h> #include "chip.h" @@ -15,7 +16,6 @@ /* Supplied by i2c.c */ extern struct device_operations picasso_i2c_mmio_ops; -extern const char *i2c_acpi_name(const struct device *dev); struct device_operations cpu_bus_ops = { .read_resources = noop_read_resources, @@ -119,6 +119,17 @@ static struct device_operations pci_ops_ops_bus_ab = { .acpi_fill_ssdt = acpi_device_write_pci_dev, }; +static void set_mmio_dev_ops(struct device *dev) +{ + switch (dev->path.mmio.addr) { + case APU_I2C2_BASE: + case APU_I2C3_BASE: + case APU_I2C4_BASE: + dev->ops = &picasso_i2c_mmio_ops; + break; + } +} + static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ @@ -136,8 +147,7 @@ static void enable_dev(struct device *dev) } sb_enable(dev); } else if (dev->path.type == DEVICE_PATH_MMIO) { - if (i2c_acpi_name(dev) != NULL) - dev->ops = &picasso_i2c_mmio_ops; + set_mmio_dev_ops(dev); } } diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c index 4c8c6697af..fa59b994a2 100644 --- a/src/soc/amd/picasso/i2c.c +++ b/src/soc/amd/picasso/i2c.c @@ -13,9 +13,6 @@ #include <soc/southbridge.h> #include "chip.h" -/* Global to provide access to chip.c */ -const char *i2c_acpi_name(const struct device *dev); - /* * We don't have addresses for I2C0-1. */ @@ -48,7 +45,7 @@ const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus) return &config->i2c[bus]; } -const char *i2c_acpi_name(const struct device *dev) +static const char *i2c_acpi_name(const struct device *dev) { switch (dev->path.mmio.addr) { case APU_I2C2_BASE: |