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authorJamie Ryu <jamie.m.ryu@intel.com>2020-05-18 10:13:31 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:38:34 +0000
commit5131c6f79a74b6f24720bab8322e9cd946e74807 (patch)
treeaf340764a26e000fac2aa60c3335bf3bfee8738d /src
parent04506e2987162ec0f280afddd6f4acac070bbf15 (diff)
downloadcoreboot-5131c6f79a74b6f24720bab8322e9cd946e74807.tar.xz
soc/intel/tigerlake: Add CPU ID for TGL B0
Reference: - TGL User Guide #613584 Rev 2.2 - TGL User Guide #605534 Rev 1.0 BRANCH=none BUG=none TEST=build and boot tglrvp Change-Id: I5da80fd4ad321b1ded369c2b6c039b73fcb3773e Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41516 Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c1
-rw-r--r--src/soc/intel/common/block/include/intelblocks/mp_init.h1
-rw-r--r--src/soc/intel/tigerlake/bootblock/report_platform.c1
3 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 5cd0134ad8..90bae163bf 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -73,6 +73,7 @@ static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P0 },
{ X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0_P1 },
{ X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 },
+ { X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0 },
{ X86_VENDOR_INTEL, CPUID_ELKHARTLAKE_A0 },
{ X86_VENDOR_INTEL, CPUID_JASPERLAKE_A0},
{ 0, 0 },
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h
index c15c323389..e03d8bd53f 100644
--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h
+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h
@@ -41,6 +41,7 @@
#define CPUID_COMETLAKE_H_S_10_2_P0 0xa0651
#define CPUID_COMETLAKE_H_S_10_2_Q0_P1 0xa0654
#define CPUID_TIGERLAKE_A0 0x806c0
+#define CPUID_TIGERLAKE_B0 0x806c1
#define CPUID_ELKHARTLAKE_A0 0x90660
/*
diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c
index d6d9f362e1..a64738d325 100644
--- a/src/soc/intel/tigerlake/bootblock/report_platform.c
+++ b/src/soc/intel/tigerlake/bootblock/report_platform.c
@@ -25,6 +25,7 @@ static struct {
const char *name;
} cpu_table[] = {
{ CPUID_TIGERLAKE_A0, "Tigerlake A0" },
+ { CPUID_TIGERLAKE_B0, "Tigerlake B0" },
};
static struct {