diff options
| author | Ionela Voinescu <ionela.voinescu@imgtec.com> | 2015-12-17 19:16:01 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-12-31 17:34:28 +0100 |
| commit | 56e64598a2ab414c514b45ca6184854d1a67aeb4 (patch) | |
| tree | b96fd67d12ed7e5f57b5c0ac38029dc296a453cb /src | |
| parent | 7100cf2b404887e4f196286e72232153ba3f0524 (diff) | |
| download | coreboot-56e64598a2ab414c514b45ca6184854d1a67aeb4.tar.xz | |
imgtec/pistachio: identity map SOC registers region
This region must be mapped uncached. This is necesary for an
U-boot payload which will obtain all register base addresses
as physical addresses from the device tree and will use them
as such.
Change-Id: Ib5041df7d90c6ef61b7448a18dd732afbd9489ca
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Reviewed-on: https://review.coreboot.org/12770
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/imgtec/pistachio/bootblock.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/imgtec/pistachio/bootblock.c b/src/soc/imgtec/pistachio/bootblock.c index eceb814447..23f6471689 100644 --- a/src/soc/imgtec/pistachio/bootblock.c +++ b/src/soc/imgtec/pistachio/bootblock.c @@ -57,4 +57,6 @@ static void bootblock_mmu_init(void) assert(!identity_map((uint32_t)_sram, _sram_size, C0_ENTRYLO_COHERENCY_WB)); assert(!identity_map(dram_base, dram_size, C0_ENTRYLO_COHERENCY_WB)); + assert(!identity_map((uint32_t)_soc_registers, _soc_registers_size, + C0_ENTRYLO_COHERENCY_UC)); } |