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authorTorsten Duwe <duwe@lst.de>2007-12-21 17:21:03 +0000
committerTorsten Duwe <duwe@lst.de>2007-12-21 17:21:03 +0000
commit679e14e3487998a383b099b181be6fcf2183f671 (patch)
tree5ab072d44d8ab3757505e6b66db54827fb72640a /src
parentdc5bccffdeefa99a468ba06f4aefdc0e4305bc09 (diff)
downloadcoreboot-679e14e3487998a383b099b181be6fcf2183f671.tar.xz
Add an interrupt entry for the onboard firewire controller,
Bus 1, device 10 (function 0 only), routed to IO-APIC pin 18 (verified on an v1.0 board). Signed-off-by: Torsten Duwe <duwe@lst.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/gigabyte/m57sli/mptable.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/gigabyte/m57sli/mptable.c b/src/mainboard/gigabyte/m57sli/mptable.c
index 749b630bb1..2d1aa1a984 100644
--- a/src/mainboard/gigabyte/m57sli/mptable.c
+++ b/src/mainboard/gigabyte/m57sli/mptable.c
@@ -137,7 +137,7 @@ void *smp_write_config_table(void *v)
for(i=0;i<4;i++) {
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[1], ((0x07+j)<<2)|i, apicid_mcp55, 0x10 + (3+i+j)%4);
}
-
+ smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[1], ((0x0a)<<2)|0, apicid_mcp55, 0x12);
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);