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authorIru Cai <mytbk920423@gmail.com>2021-05-19 22:27:53 +0800
committerIru Cai <mytbk920423@gmail.com>2021-05-21 20:30:32 +0800
commit6befea2658e59016f7026031006c4f249e03f0a3 (patch)
treeffac48697542dab92103242c762c50983f328683 /src
parentc3e43131751d38f4f406346cab248791835842ae (diff)
downloadcoreboot-6befea2658e59016f7026031006c4f249e03f0a3.tar.xz
more debug print
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/broadwell/refcode/broadwell_refcode.asm6
-rw-r--r--src/soc/intel/broadwell/refcode/print_gbe.c12
2 files changed, 14 insertions, 4 deletions
diff --git a/src/soc/intel/broadwell/refcode/broadwell_refcode.asm b/src/soc/intel/broadwell/refcode/broadwell_refcode.asm
index e6734a7f00..dcf50f4a84 100644
--- a/src/soc/intel/broadwell/refcode/broadwell_refcode.asm
+++ b/src/soc/intel/broadwell/refcode/broadwell_refcode.asm
@@ -5,6 +5,7 @@ bits 32
global refcode_entry
extern print_gbe
+extern print_cf9_reset
global PchIsGbeRegionValid
extern refcode_outb
@@ -52925,7 +52926,7 @@ sub esp, 8
mov ebx, dword [ebp + 8]
mov dword [ebx], 0x53524549
mov dword [ebx + 4], 0
-mov dword [ebx + 8], fcn_000200f7 ; mov dword [ebx + 8], 0x200f7
+mov dword [ebx + 8], cf9_reset ; mov dword [ebx + 8], 0x200f7
push 0
push 0x1f
push 0
@@ -53035,7 +53036,8 @@ pop esi
pop ebp
ret
-fcn_000200f7:
+cf9_reset:
+call print_cf9_reset
push ebp
mov ebp, esp
push edi
diff --git a/src/soc/intel/broadwell/refcode/print_gbe.c b/src/soc/intel/broadwell/refcode/print_gbe.c
index 565a82d4eb..21b9015e62 100644
--- a/src/soc/intel/broadwell/refcode/print_gbe.c
+++ b/src/soc/intel/broadwell/refcode/print_gbe.c
@@ -2,16 +2,24 @@
#include <arch/io.h>
void print_gbe(void *refcode_ppi);
+void print_cf9_reset(void);
int PchIsGbeRegionValid(uint32_t rcba);
void print_gbe(void *refcode_ppi)
{
int enable_gbe = *(char*)(refcode_ppi + 0x37e);
uint32_t rcba = *(uint32_t*)(refcode_ppi + 4);
+ uint32_t buc = *(uint32_t*)(rcba + 0x3414);
printk(BIOS_DEBUG, "enable_gbe = %d\n"
- "gbe_region_valid = %d\n",
- enable_gbe, PchIsGbeRegionValid(rcba));
+ "gbe_region_valid = %d\n"
+ "buc = 0x%x\n",
+ enable_gbe, PchIsGbeRegionValid(rcba), buc);
+}
+
+void print_cf9_reset(void)
+{
+ printk(BIOS_DEBUG, "cf9_reset...\n");
}
void refcode_outb(uint16_t port, uint8_t value);