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authorAaron Durbin <adurbin@chromium.org>2016-11-29 21:22:42 -0600
committerAaron Durbin <adurbin@chromium.org>2016-12-01 08:16:27 +0100
commit6c191d8af41859dd94a01c6a868a9186d0120923 (patch)
tree245fbd677b74dd4dba8dd25c234313d2fc6771ae /src
parent77e13997d33ce8011f711c2001f82113320511fa (diff)
downloadcoreboot-6c191d8af41859dd94a01c6a868a9186d0120923.tar.xz
romstage_handoff: add helper to determine resume status
Instead of having callers query the romstage handoff resume status by inspecting the object themselves add romstage_handoff_is_resume() so that the same information can be queried easily. Change-Id: I40f3769b7646bf296ee4bc323a9ab1d5e5691e21 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17647 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/acpi_s3.c9
-rw-r--r--src/include/romstage_handoff.h13
-rw-r--r--src/lib/prog_loaders.c25
-rw-r--r--src/soc/intel/apollolake/chip.c4
-rw-r--r--src/soc/intel/quark/chip.c5
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c7
6 files changed, 29 insertions, 34 deletions
diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c
index ffec64d03a..f3cb0971db 100644
--- a/src/arch/x86/acpi_s3.c
+++ b/src/arch/x86/acpi_s3.c
@@ -32,14 +32,7 @@ int acpi_slp_type = -1;
#if IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)
int acpi_get_sleep_type(void)
{
- struct romstage_handoff *handoff;
-
- handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO);
-
- if (handoff == NULL) {
- printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n");
- return ACPI_S0;
- } else if (handoff->s3_resume) {
+ if (romstage_handoff_is_resume()) {
printk(BIOS_DEBUG, "S3 Resume.\n");
return ACPI_S3;
} else {
diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h
index 3eba0fdaf1..9e254cd807 100644
--- a/src/include/romstage_handoff.h
+++ b/src/include/romstage_handoff.h
@@ -78,4 +78,17 @@ static inline int romstage_handoff_init(int is_s3_resume)
return 0;
}
+/* Return 1 if resuming or 0 if not. */
+static inline int romstage_handoff_is_resume(void)
+{
+ struct romstage_handoff *handoff;
+
+ handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO);
+
+ if (handoff == NULL)
+ return 0;
+
+ return handoff->s3_resume;
+}
+
#endif /* ROMSTAGE_HANDOFF_H */
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 3a6f2e26a5..58c1a8a7e0 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -85,19 +85,19 @@ static void ramstage_cache_invalid(void)
}
}
-static void run_ramstage_from_resume(struct romstage_handoff *handoff,
- struct prog *ramstage)
+static void run_ramstage_from_resume(struct prog *ramstage)
{
- if (handoff != NULL && handoff->s3_resume) {
- /* Load the cached ramstage to runtime location. */
- stage_cache_load_stage(STAGE_RAMSTAGE, ramstage);
-
- if (prog_entry(ramstage) != NULL) {
- printk(BIOS_DEBUG, "Jumping to image.\n");
- prog_run(ramstage);
- }
- ramstage_cache_invalid();
+ if (!romstage_handoff_is_resume())
+ return;
+
+ /* Load the cached ramstage to runtime location. */
+ stage_cache_load_stage(STAGE_RAMSTAGE, ramstage);
+
+ if (prog_entry(ramstage) != NULL) {
+ printk(BIOS_DEBUG, "Jumping to image.\n");
+ prog_run(ramstage);
}
+ ramstage_cache_invalid();
}
static int load_relocatable_ramstage(struct prog *ramstage)
@@ -136,8 +136,7 @@ void run_ramstage(void)
if (IS_ENABLED(CONFIG_ARCH_X86) &&
!IS_ENABLED(CONFIG_NO_STAGE_CACHE) &&
IS_ENABLED(CONFIG_EARLY_CBMEM_INIT))
- run_ramstage_from_resume(romstage_handoff_find_or_add(),
- &ramstage);
+ run_ramstage_from_resume(&ramstage);
if (prog_locate(&ramstage))
goto fail;
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index ef5908cc36..32d68cc9ad 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -260,7 +260,6 @@ static void set_power_limits(void)
static void soc_init(void *data)
{
struct global_nvs_t *gnvs;
- struct romstage_handoff *handoff;
/* Save VBT info and mapping */
vbt = vbt_get(&vbt_rdev);
@@ -269,8 +268,7 @@ static void soc_init(void *data)
* default policy that doesn't honor boards' requirements. */
itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
- handoff = romstage_handoff_find_or_add();
- fsp_silicon_init(handoff->s3_resume);
+ fsp_silicon_init(romstage_handoff_is_resume());
/* Restore GPIO IRQ polarities back to previous settings. */
itss_restore_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
diff --git a/src/soc/intel/quark/chip.c b/src/soc/intel/quark/chip.c
index 150df1272c..5e80463b0b 100644
--- a/src/soc/intel/quark/chip.c
+++ b/src/soc/intel/quark/chip.c
@@ -102,8 +102,6 @@ static const struct reg_script thermal_init_script[] = {
static void chip_init(void *chip_info)
{
- struct romstage_handoff *handoff;
-
/* Validate the temperature settings */
ASSERT(PLATFORM_CATASTROPHIC_TRIP_CELSIUS <= 255);
ASSERT(PLATFORM_CATASTROPHIC_TRIP_CELSIUS
@@ -120,8 +118,7 @@ static void chip_init(void *chip_info)
| TS_LOCK_AUX_TRIP_PT_REGS_ENABLE));
/* Perform silicon specific init. */
- handoff = romstage_handoff_find_or_add();
- fsp_silicon_init(handoff->s3_resume);
+ fsp_silicon_init(romstage_handoff_is_resume());
}
static void pci_domain_set_resources(device_t dev)
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index f096cf97e7..a1e76a9d39 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -35,13 +35,8 @@
void soc_init_pre_device(void *chip_info)
{
- struct romstage_handoff *handoff;
-
- /* Get S3 status to pass to silicon init. */
- handoff = romstage_handoff_find_or_add();
-
/* Perform silicon specific init. */
- fsp_silicon_init(handoff->s3_resume);
+ fsp_silicon_init(romstage_handoff_is_resume());
}
static void pci_domain_set_resources(device_t dev)