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authorTinghan Shen <tinghan.shen@mediatek.com>2021-04-27 17:10:28 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-04-30 06:45:52 +0000
commit715cdc370c6dcfd47f247de9ff8ccd24f0a2fa03 (patch)
tree8ddb7d4e5b5882bb7d8880ef8f47a322ed25fee6 /src
parent8ac6e09a1056f9fea56387219d1b867cdd117445 (diff)
downloadcoreboot-715cdc370c6dcfd47f247de9ff8ccd24f0a2fa03.tar.xz
soc/mediatek/mt8192: devapc: Add ADSP domain setting
Configure ADSP domain from 0 to 4 and lock it to prevent changing it unexpectedly. TEST=emerge-asurada coreboot BRANCH=asurada Change-Id: Ib938ba05e8d0342572c57366c97ebb0185da8aba Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52728 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/mediatek/mt8192/devapc.c5
-rw-r--r--src/soc/mediatek/mt8192/include/soc/devapc.h1
2 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8192/devapc.c b/src/soc/mediatek/mt8192/devapc.c
index 327896b10a..e854727355 100644
--- a/src/soc/mediatek/mt8192/devapc.c
+++ b/src/soc/mediatek/mt8192/devapc.c
@@ -71,9 +71,10 @@ static void fmem_master_init(uintptr_t base)
static void scp_master_init(uintptr_t base)
{
write32(getreg(base, SCP_DOM), MAS_DOMAIN_3);
+ write32(getreg(base, ADSP_DOM), MAS_DOMAIN_4);
- /* Let SCP_DOM register be read-only for security */
- write32(getreg(base, ONETIME_LOCK), 0x1);
+ /* Let SCP_DOM and ADSP_DOM registers be read-only for security */
+ write32(getreg(base, ONETIME_LOCK), 0x5);
}
struct devapc_init {
diff --git a/src/soc/mediatek/mt8192/include/soc/devapc.h b/src/soc/mediatek/mt8192/include/soc/devapc.h
index fd332dbd15..e79acfa2b9 100644
--- a/src/soc/mediatek/mt8192/include/soc/devapc.h
+++ b/src/soc/mediatek/mt8192/include/soc/devapc.h
@@ -23,6 +23,7 @@ enum devapc_ao_offset {
enum scp_offset {
SCP_DOM = 0xA5080,
+ ADSP_DOM = 0xA5088,
ONETIME_LOCK = 0xA5104,
};