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authorFurquan Shaikh <furquan@google.com>2020-05-20 23:40:30 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:29:06 +0000
commit7d6697d51c4452a5358344d43801335170e26e94 (patch)
tree00ded7eec78b7c429fea9b588a8b96a13bddc66b /src
parent459655abe7073d4bdbd36d7f1876eb73c1795768 (diff)
downloadcoreboot-7d6697d51c4452a5358344d43801335170e26e94.tar.xz
mb/google/volteer/var/halvor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by halvor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt. In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs. Differences in auto-generated SPD from current SPD are as follows: Part: H9HKNNNCRMBVAR-NEH Byte# Current New Explanation 4 0x16 0x15 As per datasheet, density is 8Gb per logical channel. So value should be 0x15. 6 0xB9 0x94 Signal loading is not used by MRC. Set bits 1:0 to 00. 2 channels 2 dies. Hence, 0x94 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 29,30 0xE0,0x0B 0xC0,0x08 As per datasheet, this corresponds to 280ns in MTB units which is 0x08C0. 31,32 0xF0,0x05 0x60,0x04 As per datasheet, this corresponds to 140ns in MTB units which is 0x0460. 125 0xE1 0xE0 Fine offset for tckMin. tckMin is calculated as (1/4267)*2 which comes out to be 0.46871. Some datasheets round this down to 0.468 and others round it up to 0.469. JEDEC spec uses 0.468. As per that, this value comes out to be 0xE0. Part: MT53E1G64D4SQ-046 WT:A Byte# Current New Explanation 5 0x21 0x29 As per datasheet, this part has 17row address bits and 10column address bits. This results in 0x29. 6 0xB9 0x94 Signal loading is not used by MRC. Set bits 1:0 to 00. 2 channels, 2 dies. Hence, 0x94. 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0. BUG=b:147321551,b:155423877 Change-Id: I28b065a00380516d8686279a92ef68b9f17e2f65 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41616 Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/volteer/variants/halvor/memory/Makefile.inc6
-rw-r--r--src/mainboard/google/volteer/variants/halvor/memory/dram_id.generated.txt3
-rw-r--r--src/mainboard/google/volteer/variants/halvor/memory/mem_list_variant.txt2
3 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/halvor/memory/Makefile.inc b/src/mainboard/google/volteer/variants/halvor/memory/Makefile.inc
new file mode 100644
index 0000000000..be3cfc8d35
--- /dev/null
+++ b/src/mainboard/google/volteer/variants/halvor/memory/Makefile.inc
@@ -0,0 +1,6 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+## This is an auto-generated file. Do not edit!!
+
+SPD_SOURCES =
+SPD_SOURCES += spd-1.hex # ID = 0(0b0000) Parts = H9HKNNNCRMBVAR-NEH
+SPD_SOURCES += spd-4.hex # ID = 1(0b0001) Parts = MT53E1G64D4SQ-046 WT:A
diff --git a/src/mainboard/google/volteer/variants/halvor/memory/dram_id.generated.txt b/src/mainboard/google/volteer/variants/halvor/memory/dram_id.generated.txt
new file mode 100644
index 0000000000..188b23a39c
--- /dev/null
+++ b/src/mainboard/google/volteer/variants/halvor/memory/dram_id.generated.txt
@@ -0,0 +1,3 @@
+DRAM Part Name ID to assign
+H9HKNNNCRMBVAR-NEH 0 (0000)
+MT53E1G64D4SQ-046 WT:A 1 (0001)
diff --git a/src/mainboard/google/volteer/variants/halvor/memory/mem_list_variant.txt b/src/mainboard/google/volteer/variants/halvor/memory/mem_list_variant.txt
new file mode 100644
index 0000000000..8fdcce6030
--- /dev/null
+++ b/src/mainboard/google/volteer/variants/halvor/memory/mem_list_variant.txt
@@ -0,0 +1,2 @@
+H9HKNNNCRMBVAR-NEH
+MT53E1G64D4SQ-046 WT:A