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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-28 13:09:38 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-08 04:56:34 +0000
commit80a2e0d9b9bb5af09bfaefd193efd754ebee8953 (patch)
treeab59424171dc27cb53b0d26be7ce346d360ff5a9 /src
parent833e9bad4762e0dca6c867d3a18dbaf6d5166be8 (diff)
downloadcoreboot-80a2e0d9b9bb5af09bfaefd193efd754ebee8953.tar.xz
soc/intel: Guard TRAP method in ASL
Needed to support build with ACPI_SOC_NVS=n as SMIF object inside GNVS disappears then. Change-Id: Ib798187c24996b74d6345080f7d48c3f657eb512 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50358 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/intel/common/acpi/platform.asl2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/southbridge/intel/common/acpi/platform.asl b/src/southbridge/intel/common/acpi/platform.asl
index b1dda02716..342a4eff94 100644
--- a/src/southbridge/intel/common/acpi/platform.asl
+++ b/src/southbridge/intel/common/acpi/platform.asl
@@ -17,6 +17,7 @@ Field (POST, ByteAcc, Lock, Preserve)
DBG0, 8
}
+#if CONFIG(ACPI_SOC_NVS)
/* SMI I/O Trap */
Method(TRAP, 1, Serialized)
{
@@ -24,6 +25,7 @@ Method(TRAP, 1, Serialized)
TRP0 = 0 // Generate trap
Return (SMIF) // Return value of SMI handler
}
+#endif /* ACPI_SOC_NVS */
/* The _PIC method is called by the OS to choose between interrupt
* routing via the i8259 interrupt controller or the APIC.