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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-25 16:36:18 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-11-28 12:57:08 +0000 |
| commit | 84fde762e7c4e1a8e43194a9444b10b681e1cb50 (patch) | |
| tree | c5727aaeed4cc7e59b70b6d3319c36c1cb78a9d1 /src | |
| parent | 43dd2e458f75b5d398553611f2efc818c6b18c89 (diff) | |
| download | coreboot-84fde762e7c4e1a8e43194a9444b10b681e1cb50.tar.xz | |
soc/intel/skl: correct OC pin skip value for disabled usb ports
Commit 056d552 introduced a bug where 0xFF gets set as OC pin value to
supposedly skip programming an OC pin for a disabled USB port. While the
value is correct for the other platforms, Skylake uses 0x08 for this
purpose. Correct this by using the enum value OC_SKIP (0x08) instead.
Change-Id: I41a8df3dce3712b4ab27c4e6e10160b2207406d1
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48003
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index e2aee07114..ada06f217d 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -26,6 +26,7 @@ #include <soc/pci_devs.h> #include <soc/ramstage.h> #include <soc/systemagent.h> +#include <soc/usb.h> #include <string.h> #include "chip.h" @@ -151,16 +152,16 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) if (config->usb2_ports[i].enable) params->Usb2OverCurrentPin[i] = config->usb2_ports[i].ocpin; else - params->Usb2OverCurrentPin[i] = 0xff; + params->Usb2OverCurrentPin[i] = OC_SKIP; } for (i = 0; i < ARRAY_SIZE(config->usb3_ports); i++) { params->PortUsb30Enable[i] = config->usb3_ports[i].enable; - if (config->usb3_ports[i].enable) { + if (config->usb3_ports[i].enable) params->Usb3OverCurrentPin[i] = config->usb3_ports[i].ocpin; - } else { - params->Usb3OverCurrentPin[i] = 0xff; - } + else + params->Usb3OverCurrentPin[i] = OC_SKIP; + if (config->usb3_ports[i].tx_de_emp) { params->Usb3HsioTxDeEmphEnable[i] = 1; params->Usb3HsioTxDeEmph[i] = |