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authorFelix Held <felix-coreboot@felixheld.de>2021-01-28 23:07:48 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-01-29 22:56:17 +0000
commit86c24a24528d8e7042a894d17f7e0532bcb32e14 (patch)
tree223bf55e57c2f6f5ef4e96d256c7837c276bda10 /src
parent2fae1c049407c11e393430de762d5ffa28b1a82e (diff)
downloadcoreboot-86c24a24528d8e7042a894d17f7e0532bcb32e14.tar.xz
soc/amd/cezanne/chip: add FSP silicon init driver call
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id3dea23de0c7ce2fca4382e9fd4ec88aecaa55fb Reviewed-on: https://review.coreboot.org/c/coreboot/+/50092 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/cezanne/chip.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c
index 2869c932cb..70df778aff 100644
--- a/src/soc/amd/cezanne/chip.c
+++ b/src/soc/amd/cezanne/chip.c
@@ -1,6 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/device.h>
+#include <fsp/api.h>
+#include <types.h>
#include "chip.h"
static void enable_dev(struct device *dev)
@@ -9,6 +11,7 @@ static void enable_dev(struct device *dev)
static void soc_init(void *chip_info)
{
+ fsp_silicon_init(false); /* no S3 support yet */
}
static void soc_final(void *chip_info)