diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-04-21 14:08:53 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-05-06 04:12:32 +0000 |
| commit | 87b7ec2ebb94d3c3c14c2fd6ec34ad80af950767 (patch) | |
| tree | 91ad4b5fc1afbc52eaf8e3cc278016451c1ea0ea /src | |
| parent | 8d3cc1bcc23a768af879dee160276eae489c5de8 (diff) | |
| download | coreboot-87b7ec2ebb94d3c3c14c2fd6ec34ad80af950767.tar.xz | |
soc/intel/common: Add CPU Port ID field to GPIO communities
The CPU can have its own Port IDs when addressing GPIO communities, which
differ from the PCH PCR IDs.
1) Add a field to `struct pad_community` that can hold this value when
known.
2) Add a function to return this value for a given GPIO pad.
Change-Id: I007c01758ae3026fe4dfef07b6a3a269ee3f9e33
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52590
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/common/block/gpio/gpio.c | 6 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/gpio.h | 4 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c index db7654537a..8dc92ffb34 100644 --- a/src/soc/intel/common/block/gpio/gpio.c +++ b/src/soc/intel/common/block/gpio/gpio.c @@ -787,3 +787,9 @@ bool gpio_get_vw_info(gpio_t pad, unsigned int *vw_index, unsigned int *vw_bit) return true; } + +unsigned int gpio_get_pad_cpu_portid(gpio_t pad) +{ + const struct pad_community *comm = gpio_get_community(pad); + return comm->cpu_port; +} diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h index eab257361e..86a36d5e6b 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio.h @@ -124,6 +124,7 @@ struct pad_community { uint8_t gpi_status_offset; /* specifies offset in struct gpi_status */ uint8_t port; /* PCR Port ID */ + uint8_t cpu_port; /* CPU Port ID */ const struct reset_mapping *reset_map; /* PADRSTCFG logical to chipset mapping */ size_t num_reset_vals; @@ -256,5 +257,8 @@ size_t gpio_get_index_in_group(gpio_t pad); */ bool gpio_get_vw_info(gpio_t pad, unsigned int *vw_index, unsigned int *vw_bit); +/* Returns PCR port ID for this pad for the CPU; will be 0 if not available */ +unsigned int gpio_get_pad_cpu_portid(gpio_t pad); + #endif #endif /* _SOC_INTELBLOCKS_GPIO_H_ */ |