Intel i440bx boards: Remove - using LATE_CBMEM_INIT

All boards and chips that are still using LATE_CBMEM_INIT are being removed as previously discussed. If these boards and chips are updated to not use LATE_CBMEM_INIT, they can be restored to the active codebase from the 4.7 branch. Mainboards: src/mainboard/a-trend/atc-6220 src/mainboard/a-trend/atc-6240 src/mainboard/abit/be6-ii_v2_0 src/mainboard/azza/pt-6ibd src/mainboard/biostar/m6tba src/mainboard/compaq/deskpro_en_sff_p600 src/mainboard/gigabyte/ga-6bxc src/mainboard/gigabyte/ga-6bxe src/mainboard/msi/ms6119 src/mainboard/msi/ms6147 src/mainboard/msi/ms6156 src/mainboard/nokia/ip530 src/mainboard/soyo/sy-6ba-plus-iii src/mainboard/tyan/s1846 Change-Id: Id895963f9641bcaaa65e8a8cb21213a758a9ad80 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/23301 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
author: Kyösti Mälkki <kyosti.malkki@gmail.com> 2018-01-17 15:27:18 +0200
committer: Kyösti Mälkki <kyosti.malkki@gmail.com> 2018-01-18 20:46:48 +0000
commit: 8f274e147a24f0b877420dc045625e47705b4ed9 (patch)
tree: 6881b0c20bbf93769d749a8dbe5dc4d8513ef75e /src
parent: 4c65398c10fa4583ad6b83ddc7f7873625a6ddbf (diff)
download: coreboot-8f274e147a24f0b877420dc045625e47705b4ed9.tar.xz
95 files changed, 0 insertions, 3025 deletions
diff --git a/src/mainboard/a-trend/Kconfig b/src/mainboard/a-trend/Kconfig
deleted file mode 100644
index 602e33d8a7..0000000000
--- a/src/mainboard/a-trend/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if VENDOR_A_TREND
-
-choice
-	prompt "Mainboard model"
-
-source "src/mainboard/a-trend/*/Kconfig.name"
-
-endchoice
-
-source "src/mainboard/a-trend/*/Kconfig"
-
-config MAINBOARD_VENDOR
-	string
-	default "A-Trend"
-
-endif # VENDOR_A_TREND
diff --git a/src/mainboard/a-trend/Kconfig.name b/src/mainboard/a-trend/Kconfig.name
deleted file mode 100644
index d7e228750d..0000000000
--- a/src/mainboard/a-trend/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config VENDOR_A_TREND
-	bool "A-Trend"
diff --git a/src/mainboard/a-trend/atc-6220/Kconfig b/src/mainboard/a-trend/atc-6220/Kconfig
deleted file mode 100644
index d2b8995251..0000000000
--- a/src/mainboard/a-trend/atc-6220/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_A_TREND_ATC_6220
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_WINBOND_W83977TF
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default a-trend/atc-6220
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "ATC-6220"
-
-config IRQ_SLOT_COUNT
-	int
-	default 7
-
-endif # BOARD_A_TREND_ATC_6220
diff --git a/src/mainboard/a-trend/atc-6220/Kconfig.name b/src/mainboard/a-trend/atc-6220/Kconfig.name
deleted file mode 100644
index 06fead597e..0000000000
--- a/src/mainboard/a-trend/atc-6220/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_A_TREND_ATC_6220
-	bool "ATC-6220"
diff --git a/src/mainboard/a-trend/atc-6220/board_info.txt b/src/mainboard/a-trend/atc-6220/board_info.txt
deleted file mode 100644
index a56cca3b42..0000000000
--- a/src/mainboard/a-trend/atc-6220/board_info.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-Category: desktop
-Board URL: http://www.motherboard.cz/mb/atrend/atc6220.htm
-ROM package: DIP32
-ROM protocol: Parallel
-ROM socketed: y
-Flashrom support: y
diff --git a/src/mainboard/a-trend/atc-6220/devicetree.cb b/src/mainboard/a-trend/atc-6220/devicetree.cb
deleted file mode 100644
index 0dea9aedfb..0000000000
--- a/src/mainboard/a-trend/atc-6220/devicetree.cb
+++ /dev/null
@@ -1,59 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/winbond/w83977tf	# Super I/O (FIXME: It's W83977EF!)
-          device pnp 3f0.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 3f0.1 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-          end
-          device pnp 3f0.2 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 3f0.3 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 3f0.5 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1		# PS/2 keyboard interrupt
-            irq 0x72 = 12		# PS/2 mouse interrupt
-          end
-          device pnp 3f0.6 on		# Consumer IR
-          end
-          device pnp 3f0.7 on		# GPIO 1
-          end
-          device pnp 3f0.8 on		# GPIO 2
-          end
-          device pnp 3f0.a on		# ACPI
-          end
-        end
-      end
-      device pci 7.1 on	end		# IDE
-      device pci 7.2 on	end		# USB
-      device pci 7.3 on end		# ACPI
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "0"
-      register "ide0_drive1_udma33_enable" = "0"
-      register "ide1_drive0_udma33_enable" = "0"
-      register "ide1_drive1_udma33_enable" = "0"
-    end
-  end
-end
diff --git a/src/mainboard/a-trend/atc-6220/irq_tables.c b/src/mainboard/a-trend/atc-6220/irq_tables.c
deleted file mode 100644
index eaa126687a..0000000000
--- a/src/mainboard/a-trend/atc-6220/irq_tables.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,
-	PIRQ_VERSION,
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router device */
-	0x600,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x4e,			/* Checksum */
-	{
-		/* bus,       dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x0a << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x0b << 3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},
-		{0x00,(0x0c << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
-		{0x00,(0x0d << 3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
-		{0x00,(0x07 << 3)|0x1, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x01 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x07 << 3)|0x2, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/a-trend/atc-6220/romstage.c b/src/mainboard/a-trend/atc-6220/romstage.c
deleted file mode 100644
index 70e4323281..0000000000
--- a/src/mainboard/a-trend/atc-6220/romstage.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/winbond/common/winbond.h>
-#include <superio/winbond/w83977tf/w83977tf.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/a-trend/atc-6240/Kconfig b/src/mainboard/a-trend/atc-6240/Kconfig
deleted file mode 100644
index 03e0241e7b..0000000000
--- a/src/mainboard/a-trend/atc-6240/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_A_TREND_ATC_6240
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_WINBOND_W83627HF
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default a-trend/atc-6240
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "ATC-6240"
-
-config IRQ_SLOT_COUNT
-	int
-	default 7
-
-endif # BOARD_A_TREND_ATC_6240
diff --git a/src/mainboard/a-trend/atc-6240/Kconfig.name b/src/mainboard/a-trend/atc-6240/Kconfig.name
deleted file mode 100644
index e80b7122b5..0000000000
--- a/src/mainboard/a-trend/atc-6240/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_A_TREND_ATC_6240
-	bool "ATC-6240"
diff --git a/src/mainboard/a-trend/atc-6240/board_info.txt b/src/mainboard/a-trend/atc-6240/board_info.txt
deleted file mode 100644
index 1acf41bcb1..0000000000
--- a/src/mainboard/a-trend/atc-6240/board_info.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-Category: desktop
-Board URL: http://active-hardware.com/english/reviews/mainboard/atc6240.htm
-ROM package: DIP32
-ROM protocol: Parallel
diff --git a/src/mainboard/a-trend/atc-6240/devicetree.cb b/src/mainboard/a-trend/atc-6240/devicetree.cb
deleted file mode 100644
index e0bfdac065..0000000000
--- a/src/mainboard/a-trend/atc-6240/devicetree.cb
+++ /dev/null
@@ -1,69 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/winbond/w83627hf	# Super I/O
-          device pnp 3f0.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 3f0.1 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-            drq 0x74 = 3
-          end
-          device pnp 3f0.2 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 3f0.3 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 3f0.5 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1		# PS/2 keyboard interrupt
-            irq 0x72 = 12		# PS/2 mouse interrupt
-          end
-          device pnp 3f0.6 on		# Consumer IR
-            io 0x60 = 0x00
-          end
-          device pnp 3f0.7 on		# Game port / MIDI / GPIO 1
-            io 0x60 = 0x201
-            io 0x62 = 0x330
-            irq 0x70 = 9
-          end
-          device pnp 3f0.8 off		# GPIO 2 / WDT
-          end
-          device pnp 3f0.9 off		# GPIO 3
-          end
-          device pnp 3f0.a off		# ACPI
-          end
-          device pnp 3f0.b off		# HWM (TODO)
-          end
-        end
-      end
-      device pci 7.1 on	end		# IDE
-      device pci 7.2 on	end		# USB
-      device pci 7.3 on end		# ACPI
-      device pci c.0 on end		# Onboard audio (ES1371)
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "0"
-      register "ide0_drive1_udma33_enable" = "0"
-      register "ide1_drive0_udma33_enable" = "0"
-      register "ide1_drive1_udma33_enable" = "0"
-    end
-  end
-end
diff --git a/src/mainboard/a-trend/atc-6240/irq_tables.c b/src/mainboard/a-trend/atc-6240/irq_tables.c
deleted file mode 100644
index d0119fc467..0000000000
--- a/src/mainboard/a-trend/atc-6240/irq_tables.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,
-	PIRQ_VERSION,
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router device */
-	0xc20,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x44,			/* Checksum */
-	{
-		/* bus,       dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x0a << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x0e << 3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x2, 0x0},
-		{0x00,(0x0b << 3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x3, 0x0},
-		{0x00,(0x0c << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x4, 0x0},
-		{0x00,(0x0d << 3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x5, 0x0},
-		{0x00,(0x07 << 3)|0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x01 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/a-trend/atc-6240/romstage.c b/src/mainboard/a-trend/atc-6240/romstage.c
deleted file mode 100644
index 8dd968660f..0000000000
--- a/src/mainboard/a-trend/atc-6240/romstage.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/winbond/common/winbond.h>
-#include <superio/winbond/w83627hf/w83627hf.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x3f0, W83627HF_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/abit/Kconfig b/src/mainboard/abit/Kconfig
deleted file mode 100644
index bdf31437ed..0000000000
--- a/src/mainboard/abit/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if VENDOR_ABIT
-
-choice
-	prompt "Mainboard model"
-
-source "src/mainboard/abit/*/Kconfig.name"
-
-endchoice
-
-source "src/mainboard/abit/*/Kconfig"
-
-config MAINBOARD_VENDOR
-	string
-	default "Abit"
-
-endif # VENDOR_ABIT
diff --git a/src/mainboard/abit/Kconfig.name b/src/mainboard/abit/Kconfig.name
deleted file mode 100644
index 385be00bc3..0000000000
--- a/src/mainboard/abit/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config VENDOR_ABIT
-	bool "Abit"
diff --git a/src/mainboard/abit/be6-ii_v2_0/Kconfig b/src/mainboard/abit/be6-ii_v2_0/Kconfig
deleted file mode 100644
index e55572f194..0000000000
--- a/src/mainboard/abit/be6-ii_v2_0/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_ABIT_BE6_II_V2_0
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_WINBOND_W83977TF
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default abit/be6-ii_v2_0
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "BE6-II V2.0"
-
-config IRQ_SLOT_COUNT
-	int
-	default 9
-
-endif # BOARD_ABIT_BE6_II_V2_0
diff --git a/src/mainboard/abit/be6-ii_v2_0/Kconfig.name b/src/mainboard/abit/be6-ii_v2_0/Kconfig.name
deleted file mode 100644
index 79d2bd1103..0000000000
--- a/src/mainboard/abit/be6-ii_v2_0/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_ABIT_BE6_II_V2_0
-	bool "BE6-II V2.0"
diff --git a/src/mainboard/abit/be6-ii_v2_0/board_info.txt b/src/mainboard/abit/be6-ii_v2_0/board_info.txt
deleted file mode 100644
index 078ab8f2c5..0000000000
--- a/src/mainboard/abit/be6-ii_v2_0/board_info.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-Category: desktop
-Board URL: http://www.extremeoverclocking.com/reviews/motherboards/BE6-II_v2_1.html
-ROM package: DIP32
-ROM protocol: Parallel
-Flashrom support: &mdash;
diff --git a/src/mainboard/abit/be6-ii_v2_0/devicetree.cb b/src/mainboard/abit/be6-ii_v2_0/devicetree.cb
deleted file mode 100644
index 3a6648a14d..0000000000
--- a/src/mainboard/abit/be6-ii_v2_0/devicetree.cb
+++ /dev/null
@@ -1,59 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/winbond/w83977tf	# Super I/O (FIXME: It's W83977EF!)
-          device pnp 3f0.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 3f0.1 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-          end
-          device pnp 3f0.2 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 3f0.3 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 3f0.5 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1		# PS/2 keyboard interrupt
-            irq 0x72 = 12		# PS/2 mouse interrupt
-          end
-          device pnp 3f0.6 on		# Consumer IR
-          end
-          device pnp 3f0.7 on		# GPIO 1
-          end
-          device pnp 3f0.8 on		# GPIO 2
-          end
-          device pnp 3f0.a on		# ACPI
-          end
-        end
-      end
-      device pci 7.1 on	end		# IDE, UDMA/33 (part of 82371EB)
-      device pci 7.2 on	end		# USB
-      device pci 7.3 on end		# ACPI
-      device pci 13.0 on end		# IDE, UDMA/66 (HPT366 controller)
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      register "ide0_drive0_udma33_enable" = "1"
-      register "ide0_drive1_udma33_enable" = "1"
-      register "ide1_drive0_udma33_enable" = "1"
-      register "ide1_drive1_udma33_enable" = "1"
-    end
-  end
-end
diff --git a/src/mainboard/abit/be6-ii_v2_0/irq_tables.c b/src/mainboard/abit/be6-ii_v2_0/irq_tables.c
deleted file mode 100644
index 12c9d3d499..0000000000
--- a/src/mainboard/abit/be6-ii_v2_0/irq_tables.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,
-	PIRQ_VERSION,
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router device */
-	0x1c20,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x4b,			/* Checksum */
-	{
-		/* bus,       dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x13 << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x11 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x2, 0x0},
-		{0x00,(0x0f << 3)|0x0, {{0x61, 0xdeb8}, {0x63, 0xdeb8}, {0x62, 0xdeb8}, {0x60, 0x0deb8}}, 0x3, 0x0},
-		{0x00,(0x0d << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x4, 0x0},
-		{0x00,(0x0b << 3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x5, 0x0},
-		{0x00,(0x09 << 3)|0x0, {{0x61, 0xdeb8}, {0x60, 0xdeb8}, {0x63, 0xdeb8}, {0x62, 0x0deb8}}, 0x6, 0x0},
-		{0x00,(0x08 << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x7, 0x0},
-		{0x00,(0x07 << 3)|0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x01 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/abit/be6-ii_v2_0/romstage.c b/src/mainboard/abit/be6-ii_v2_0/romstage.c
deleted file mode 100644
index fb470b2ecb..0000000000
--- a/src/mainboard/abit/be6-ii_v2_0/romstage.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <delay.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/winbond/common/winbond.h>
-/* FIXME: It's a Winbond W83977EF, actually. */
-#include <superio/winbond/w83977tf/w83977tf.h>
-#include <lib.h>
-
-/* FIXME: It's a Winbond W83977EF, actually. */
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	dump_spd_registers();
-	sdram_set_registers();
-	sdram_set_spd_registers();
-	sdram_enable();
-}
diff --git a/src/mainboard/azza/Kconfig b/src/mainboard/azza/Kconfig
deleted file mode 100644
index e8efa7f603..0000000000
--- a/src/mainboard/azza/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if VENDOR_AZZA
-
-choice
-	prompt "Mainboard model"
-
-source "src/mainboard/azza/*/Kconfig.name"
-
-endchoice
-
-source "src/mainboard/azza/*/Kconfig"
-
-config MAINBOARD_VENDOR
-	string
-	default "AZZA"
-
-endif # VENDOR_AZZA
diff --git a/src/mainboard/azza/Kconfig.name b/src/mainboard/azza/Kconfig.name
deleted file mode 100644
index 0b6401df90..0000000000
--- a/src/mainboard/azza/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config VENDOR_AZZA
-	bool "AZZA"
diff --git a/src/mainboard/azza/pt-6ibd/Kconfig b/src/mainboard/azza/pt-6ibd/Kconfig
deleted file mode 100644
index 310143f581..0000000000
--- a/src/mainboard/azza/pt-6ibd/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_AZZA_PT_6IBD
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_WINBOND_W83977TF
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default azza/pt-6ibd
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "PT-6IBD"
-
-config IRQ_SLOT_COUNT
-	int
-	default 7
-
-endif # BOARD_AZZA_PT_6IBD
diff --git a/src/mainboard/azza/pt-6ibd/Kconfig.name b/src/mainboard/azza/pt-6ibd/Kconfig.name
deleted file mode 100644
index 4a2541ca0e..0000000000
--- a/src/mainboard/azza/pt-6ibd/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_AZZA_PT_6IBD
-	bool "PT-6IBD"
diff --git a/src/mainboard/azza/pt-6ibd/board_info.txt b/src/mainboard/azza/pt-6ibd/board_info.txt
deleted file mode 100644
index 3a7ef4fea6..0000000000
--- a/src/mainboard/azza/pt-6ibd/board_info.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-Category: desktop
-Board URL: http://web.tiscali.it/acorp/?http://web.archive.org/web/20050426181911/http://web.tiscali.it/acorp/mobo_spec/azza/pt-6ibd/pt-6ibd.htm
-ROM package: DIP32
-ROM protocol: Parallel
diff --git a/src/mainboard/azza/pt-6ibd/devicetree.cb b/src/mainboard/azza/pt-6ibd/devicetree.cb
deleted file mode 100644
index a2f5513e4d..0000000000
--- a/src/mainboard/azza/pt-6ibd/devicetree.cb
+++ /dev/null
@@ -1,59 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/winbond/w83977tf	# Super I/O (FIXME: It's W83977EF!)
-          device pnp 3f0.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 3f0.1 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-          end
-          device pnp 3f0.2 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 3f0.3 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 3f0.5 on		# PS/2 keyboard / mouse
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1		# PS/2 keyboard interrupt
-            irq 0x72 = 12		# PS/2 mouse interrupt
-          end
-          device pnp 3f0.6 on		# Consumer IR
-          end
-          device pnp 3f0.7 on		# GPIO 1
-          end
-          device pnp 3f0.8 on		# GPIO 2
-          end
-          device pnp 3f0.a on		# ACPI
-          end
-        end
-      end
-      device pci 7.1 on	end		# IDE
-      device pci 7.2 on	end		# USB
-      device pci 7.3 on end		# ACPI
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "0"
-      register "ide0_drive1_udma33_enable" = "0"
-      register "ide1_drive0_udma33_enable" = "0"
-      register "ide1_drive1_udma33_enable" = "0"
-    end
-  end
-end
diff --git a/src/mainboard/azza/pt-6ibd/irq_tables.c b/src/mainboard/azza/pt-6ibd/irq_tables.c
deleted file mode 100644
index 8807792e3b..0000000000
--- a/src/mainboard/azza/pt-6ibd/irq_tables.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,
-	PIRQ_VERSION,
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router device */
-	0xc00,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x3c,			/* Checksum */
-	{
-		/* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x09 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x0b << 3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},
-		{0x00,(0x0d << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
-		{0x00,(0x0f << 3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
-		{0x00,(0x11 << 3)|0x0, {{0x61, 0xdeb8}, {0x60, 0xdeb8}, {0x63, 0xdeb8}, {0x62, 0x0deb8}}, 0x5, 0x0},
-		{0x00,(0x07 << 3)|0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x01 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/azza/pt-6ibd/romstage.c b/src/mainboard/azza/pt-6ibd/romstage.c
deleted file mode 100644
index eb031e0c7c..0000000000
--- a/src/mainboard/azza/pt-6ibd/romstage.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/winbond/common/winbond.h>
-/* FIXME: It's a Winbond W83977EF, actually. */
-#include <superio/winbond/w83977tf/w83977tf.h>
-#include <lib.h>
-
-/* FIXME: It's a Winbond W83977EF, actually. */
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/biostar/m6tba/Kconfig b/src/mainboard/biostar/m6tba/Kconfig
deleted file mode 100644
index a4cdbe4767..0000000000
--- a/src/mainboard/biostar/m6tba/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_BIOSTAR_M6TBA
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_SMSC_SMSCSUPERIO
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default biostar/m6tba
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "M6TBA"
-
-config IRQ_SLOT_COUNT
-	int
-	default 7
-
-endif # BOARD_BIOSTAR_M6TBA
diff --git a/src/mainboard/biostar/m6tba/Kconfig.name b/src/mainboard/biostar/m6tba/Kconfig.name
deleted file mode 100644
index 3db00165e6..0000000000
--- a/src/mainboard/biostar/m6tba/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_BIOSTAR_M6TBA
-	bool "M6TBA"
diff --git a/src/mainboard/biostar/m6tba/board_info.txt b/src/mainboard/biostar/m6tba/board_info.txt
deleted file mode 100644
index a8fcc43b09..0000000000
--- a/src/mainboard/biostar/m6tba/board_info.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-Category: desktop
-Board URL: http://www.motherboard.cz/mb/biostar/M6TBA.htm
-ROM package: DIP32
-ROM protocol: Parallel
-ROM socketed: y
-Flashrom support: n
diff --git a/src/mainboard/biostar/m6tba/devicetree.cb b/src/mainboard/biostar/m6tba/devicetree.cb
deleted file mode 100644
index 0d35e9cb4a..0000000000
--- a/src/mainboard/biostar/m6tba/devicetree.cb
+++ /dev/null
@@ -1,53 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/smsc/smscsuperio	# Super I/O
-          device pnp 3f0.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 3f0.3 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-          end
-          device pnp 3f0.4 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 3f0.5 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 3f0.7 on		# PS/2 keyboard / mouse
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1		# PS/2 keyboard interrupt
-            irq 0x72 = 12		# PS/2 mouse interrupt
-          end
-          device pnp 3f0.8 on		# Aux I/O
-          end
-        end
-      end
-      device pci 7.1 on	end		# IDE
-      device pci 7.2 on	end		# USB
-      device pci 7.3 on end		# ACPI
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "0"
-      register "ide0_drive1_udma33_enable" = "0"
-      register "ide1_drive0_udma33_enable" = "0"
-      register "ide1_drive1_udma33_enable" = "0"
-    end
-  end
-end
diff --git a/src/mainboard/biostar/m6tba/irq_tables.c b/src/mainboard/biostar/m6tba/irq_tables.c
deleted file mode 100644
index 61cba0f053..0000000000
--- a/src/mainboard/biostar/m6tba/irq_tables.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,
-	PIRQ_VERSION,
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router device */
-	0xc00,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0xc7,			/* Checksum */
-	{
-		/* bus,       dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x08 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x09 << 3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},
-		{0x00,(0x0a << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
-		{0x00,(0x0b << 3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
-		{0x00,(0x07 << 3)|0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x01 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x07 << 3)|0x2, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/biostar/m6tba/romstage.c b/src/mainboard/biostar/m6tba/romstage.c
deleted file mode 100644
index fd16006711..0000000000
--- a/src/mainboard/biostar/m6tba/romstage.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <stdlib.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <delay.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/smsc/smscsuperio/smscsuperio.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-	enable_smbus();
-
-	dump_spd_registers();
-	sdram_set_registers();
-	sdram_set_spd_registers();
-	sdram_enable();
-}
diff --git a/src/mainboard/compaq/Kconfig b/src/mainboard/compaq/Kconfig
deleted file mode 100644
index 3ab29c0bfe..0000000000
--- a/src/mainboard/compaq/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if VENDOR_COMPAQ
-
-choice
-	prompt "Mainboard model"
-
-source "src/mainboard/compaq/*/Kconfig.name"
-
-endchoice
-
-source "src/mainboard/compaq/*/Kconfig"
-
-config MAINBOARD_VENDOR
-	string
-	default "Compaq"
-
-endif # VENDOR_COMPAQ
diff --git a/src/mainboard/compaq/Kconfig.name b/src/mainboard/compaq/Kconfig.name
deleted file mode 100644
index 0fc95d55e7..0000000000
--- a/src/mainboard/compaq/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config VENDOR_COMPAQ
-	bool "Compaq"
diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig b/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig
deleted file mode 100644
index 4b157edce3..0000000000
--- a/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig
+++ /dev/null
@@ -1,40 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_COMPAQ_DESKPRO_EN_SFF_P600
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	# should be SUPERIO_NSC_PC97307!
-	select SUPERIO_NSC_PC97317
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default compaq/deskpro_en_sff_p600
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "Deskpro EN SFF P600"
-
-config IRQ_SLOT_COUNT
-	int
-	default 5
-
-endif # BOARD_COMPAQ_DESKPRO_EN_SFF_P600
diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig.name b/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig.name
deleted file mode 100644
index e226cd7b92..0000000000
--- a/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_COMPAQ_DESKPRO_EN_SFF_P600
-	bool "Deskpro EN SFF P600"
diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/board_info.txt b/src/mainboard/compaq/deskpro_en_sff_p600/board_info.txt
deleted file mode 100644
index c7f95704b3..0000000000
--- a/src/mainboard/compaq/deskpro_en_sff_p600/board_info.txt
+++ /dev/null
@@ -1,3 +0,0 @@
-Category: desktop
-ROM package: DIP32
-ROM protocol: Parallel
diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb b/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb
deleted file mode 100644
index def9e2f065..0000000000
--- a/src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb
+++ /dev/null
@@ -1,63 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    device pci a.0 on end		# NIC (onboard)
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 14.0 on		# ISA bridge
-        # chip superio/nsc/pc97307	# Super I/O
-        chip superio/nsc/pc97317	# Super I/O (FIXME: Should be PC97307!)
-          device pnp 15c.0 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1
-          end
-          device pnp 15c.1 on		# PS/2 mouse
-            irq 0x70 = 12
-          end
-          device pnp 15c.2 on		# RTC, APC
-            io 0x60 = 0x70
-            irq 0x70 = 8
-          end
-          device pnp 15c.3 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 15c.4 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-          end
-          device pnp 15c.5 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 15c.6 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 15c.7 on		# GPIO 1
-          end
-          device pnp 15c.8 on		# Power management
-          end
-        end
-      end
-      device pci 14.1 on end		# IDE
-      device pci 14.2 on end		# USB
-      device pci 14.3 on end		# ACPI
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "0"
-      register "ide0_drive1_udma33_enable" = "0"
-      register "ide1_drive0_udma33_enable" = "0"
-      register "ide1_drive1_udma33_enable" = "0"
-    end
-  end
-end
diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/irq_tables.c b/src/mainboard/compaq/deskpro_en_sff_p600/irq_tables.c
deleted file mode 100644
index 426222f71a..0000000000
--- a/src/mainboard/compaq/deskpro_en_sff_p600/irq_tables.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,
-	PIRQ_VERSION,
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x14 << 3) | 0x0,	/* Interrupt router device */
-	0,			/* IRQs devoted exclusively to PCI usage */
-	0,/* FIXME */		/* Vendor */
-	0,/* FIXME */		/* Device */
-	0,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x97,			/* Checksum */
-	{
-		/* bus,       dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x0d << 3)|0x0, {{0x60, 0x0ef8}, {0x61, 0x0ef8}, {0x62, 0x0ef8}, {0x63, 0x00ef8}}, 0x1, 0x0},
-		{0x00,(0x0e << 3)|0x0, {{0x61, 0x0ef8}, {0x62, 0x0ef8}, {0x63, 0x0ef8}, {0x60, 0x00ef8}}, 0x2, 0x0},
-		{0x00,(0x0a << 3)|0x0, {{0x63, 0x0ef8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0},
-		{0x00,(0x14 << 3)|0x0, {{0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}, {0x63, 0x00ef8}}, 0x0, 0x0},
-		{0x00,(0x01 << 3)|0x0, {{0x62, 0x0ef8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c
deleted file mode 100644
index 712ea96120..0000000000
--- a/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-/* FIXME: This should be PC97307 (but it's buggy at the moment)! */
-#include <superio/nsc/pc97317/pc97317.h>
-#include <lib.h>
-
-/* FIXME: This should be PC97307 (but it's buggy at the moment)! */
-#define SERIAL_DEV PNP_DEV(0x15c, PC97317_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	/* FIXME: Should be PC97307! */
-	pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/gigabyte/ga-6bxc/Kconfig b/src/mainboard/gigabyte/ga-6bxc/Kconfig
deleted file mode 100644
index 0bb5dfee4a..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_GIGABYTE_GA_6BXC
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_ITE_IT8671F
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default gigabyte/ga-6bxc
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "GA-6BXC"
-
-config IRQ_SLOT_COUNT
-	int
-	default 6
-
-endif # BOARD_GIGABYTE_GA_6BXC
diff --git a/src/mainboard/gigabyte/ga-6bxc/Kconfig.name b/src/mainboard/gigabyte/ga-6bxc/Kconfig.name
deleted file mode 100644
index 4fb58428c6..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_GIGABYTE_GA_6BXC
-	bool "GA-6BXC"
diff --git a/src/mainboard/gigabyte/ga-6bxc/board_info.txt b/src/mainboard/gigabyte/ga-6bxc/board_info.txt
deleted file mode 100644
index 029d54396d..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/board_info.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-Category: desktop
-Board URL: http://www.gigabyte.com/products/product-page.aspx?pid=1445#sp
-ROM package: DIP32
-ROM protocol: Parallel
-ROM socketed: y
-Flashrom support: y
-Release year: 1998
diff --git a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb b/src/mainboard/gigabyte/ga-6bxc/devicetree.cb
deleted file mode 100644
index 5b5c1ae325..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/devicetree.cb
+++ /dev/null
@@ -1,57 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/ite/it8671f	# Super I/O
-          device pnp 3f0.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 3f0.1 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 3f0.2 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 3f0.3 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-          end
-          device pnp 3f0.4 on		# APC
-          end
-          device pnp 3f0.5 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1
-          end
-          device pnp 3f0.6 on		# PS/2 mouse
-            irq 0x70 = 12
-          end
-          device pnp 3f0.7 on		# GPIO
-          end
-        end
-      end
-      device pci 7.1 on	end		# IDE
-      device pci 7.2 on	end		# USB
-      device pci 7.3 on end		# ACPI
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "0"
-      register "ide0_drive1_udma33_enable" = "0"
-      register "ide1_drive0_udma33_enable" = "0"
-      register "ide1_drive1_udma33_enable" = "0"
-    end
-  end
-end
diff --git a/src/mainboard/gigabyte/ga-6bxc/irq_tables.c b/src/mainboard/gigabyte/ga-6bxc/irq_tables.c
deleted file mode 100644
index 3a641d583d..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/irq_tables.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,
-	PIRQ_VERSION,
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router device */
-	0xc00,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x8,			/* Checksum */
-	{
-		/* bus,       dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x08 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x09 << 3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},
-		{0x00,(0x0a << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
-		{0x00,(0x0b << 3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
-		{0x00,(0x07 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x01 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/gigabyte/ga-6bxc/romstage.c b/src/mainboard/gigabyte/ga-6bxc/romstage.c
deleted file mode 100644
index 7f85e0eeea..0000000000
--- a/src/mainboard/gigabyte/ga-6bxc/romstage.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/ite/it8671f/it8671f.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/gigabyte/ga-6bxe/Kconfig b/src/mainboard/gigabyte/ga-6bxe/Kconfig
deleted file mode 100644
index 3e9b28fe78..0000000000
--- a/src/mainboard/gigabyte/ga-6bxe/Kconfig
+++ /dev/null
@@ -1,41 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2010 Anders Jenbo <anders@jenbo.dk>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_GIGABYTE_GA_6BXE
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_ITE_IT8671F
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-	select SDRAMPWR_4DIMM
-
-config MAINBOARD_DIR
-	string
-	default gigabyte/ga-6bxe
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "GA-6BXE"
-
-config IRQ_SLOT_COUNT
-	int
-	default 7
-
-endif # BOARD_GIGABYTE_GA_6BXE
diff --git a/src/mainboard/gigabyte/ga-6bxe/Kconfig.name b/src/mainboard/gigabyte/ga-6bxe/Kconfig.name
deleted file mode 100644
index 0912807ab9..0000000000
--- a/src/mainboard/gigabyte/ga-6bxe/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_GIGABYTE_GA_6BXE
-	bool "GA-6BXE"
diff --git a/src/mainboard/gigabyte/ga-6bxe/board_info.txt b/src/mainboard/gigabyte/ga-6bxe/board_info.txt
deleted file mode 100644
index 2b4a84d1bb..0000000000
--- a/src/mainboard/gigabyte/ga-6bxe/board_info.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-Category: desktop
-Board URL: http://www.gigabyte.com/products/product-page.aspx?pid=1430#sp
-ROM package: DIP32
-ROM protocol: Parallel
-ROM socketed: y
-Flashrom support: y
-Release year: 1999
diff --git a/src/mainboard/gigabyte/ga-6bxe/devicetree.cb b/src/mainboard/gigabyte/ga-6bxe/devicetree.cb
deleted file mode 100644
index 85f478559a..0000000000
--- a/src/mainboard/gigabyte/ga-6bxe/devicetree.cb
+++ /dev/null
@@ -1,57 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/ite/it8671f	# Super I/O
-          device pnp 3f0.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 3f0.1 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 3f0.2 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 3f0.3 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-          end
-          device pnp 3f0.4 on		# APC
-          end
-          device pnp 3f0.5 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1
-          end
-          device pnp 3f0.6 on		# PS/2 mouse
-            irq 0x70 = 12
-          end
-          device pnp 3f0.7 on		# GPIO
-          end
-        end
-      end
-      device pci 7.1 on end		# IDE
-      device pci 7.2 on end		# USB
-      device pci 7.3 on end		# ACPI
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "1"
-      register "ide0_drive1_udma33_enable" = "1"
-      register "ide1_drive0_udma33_enable" = "1"
-      register "ide1_drive1_udma33_enable" = "1"
-    end
-  end
-end
diff --git a/src/mainboard/gigabyte/ga-6bxe/irq_tables.c b/src/mainboard/gigabyte/ga-6bxe/irq_tables.c
deleted file mode 100644
index ca3af708ae..0000000000
--- a/src/mainboard/gigabyte/ga-6bxe/irq_tables.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Anders Jenbo <anders@jenbo.dk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,		/* u32 signature */
-	PIRQ_VERSION,		/* u16 version */
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router dev */
-	0xc00,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0xb4,			/* Checksum (has to be set to some value that
-				 * would give 0 after the sum of all bytes
-				 * for this structure (including checksum).
-				 */
-	{
-		/* bus,        dev | fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
-		{0x00, (0x08 << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x1, 0x0},
-		{0x00, (0x09 << 3) | 0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}}, 0x2, 0x0},
-		{0x00, (0x0a << 3) | 0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}}, 0x3, 0x0},
-		{0x00, (0x0b << 3) | 0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}}, 0x4, 0x0},
-		{0x00, (0x0c << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x5, 0x0},
-		{0x00, (0x07 << 3) | 0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0},
-		{0x00, (0x01 << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/gigabyte/ga-6bxe/romstage.c b/src/mainboard/gigabyte/ga-6bxe/romstage.c
deleted file mode 100644
index d4bdbe8dbb..0000000000
--- a/src/mainboard/gigabyte/ga-6bxe/romstage.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Anders Jenbo <anders@jenbo.dk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/ite/it8671f/it8671f.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	it8671f_48mhz_clkin();
-	it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/msi/ms6119/Kconfig b/src/mainboard/msi/ms6119/Kconfig
deleted file mode 100644
index a77280e754..0000000000
--- a/src/mainboard/msi/ms6119/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_MSI_MS_6119
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_WINBOND_W83977TF
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default msi/ms6119
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "MS-6119"
-
-config IRQ_SLOT_COUNT
-	int
-	default 7
-
-endif # BOARD_MSI_MS_6119
diff --git a/src/mainboard/msi/ms6119/Kconfig.name b/src/mainboard/msi/ms6119/Kconfig.name
deleted file mode 100644
index 8517e6bbe9..0000000000
--- a/src/mainboard/msi/ms6119/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_MSI_MS_6119
-	bool "MS-6119"
diff --git a/src/mainboard/msi/ms6119/board_info.txt b/src/mainboard/msi/ms6119/board_info.txt
deleted file mode 100644
index cf0f1bc374..0000000000
--- a/src/mainboard/msi/ms6119/board_info.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-Category: desktop
-Board URL: http://no.msi.com/product/mb/MS-6119.html
-ROM package: DIP32
-ROM protocol: Parallel
-Release year: 1998
diff --git a/src/mainboard/msi/ms6119/devicetree.cb b/src/mainboard/msi/ms6119/devicetree.cb
deleted file mode 100644
index 159a4448b4..0000000000
--- a/src/mainboard/msi/ms6119/devicetree.cb
+++ /dev/null
@@ -1,60 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/winbond/w83977tf	# Super I/O
-          device pnp 3f0.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 3f0.1 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-            drq 0x74 = 3
-          end
-          device pnp 3f0.2 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 3f0.3 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 3f0.5 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1		# PS/2 keyboard interrupt
-            irq 0x72 = 12		# PS/2 mouse interrupt
-          end
-          device pnp 3f0.7 on		# GPIO 1
-          end
-          device pnp 3f0.8 on		# GPIO 2
-          end
-          device pnp 3f0.9 on		# GPIO 3
-          end
-          device pnp 3f0.a on		# ACPI
-          end
-        end
-      end
-      device pci 7.1 on	end		# IDE
-      device pci 7.2 on	end		# USB
-      device pci 7.3 on end		# ACPI
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "0"
-      register "ide0_drive1_udma33_enable" = "0"
-      register "ide1_drive0_udma33_enable" = "0"
-      register "ide1_drive1_udma33_enable" = "0"
-    end
-  end
-end
diff --git a/src/mainboard/msi/ms6119/irq_tables.c b/src/mainboard/msi/ms6119/irq_tables.c
deleted file mode 100644
index 2b9f7f49c9..0000000000
--- a/src/mainboard/msi/ms6119/irq_tables.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,
-	PIRQ_VERSION,
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router device */
-	0x800,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x9c,			/* Checksum */
-	{
-		/* bus,       dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x0e << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x10 << 3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},
-		{0x00,(0x12 << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
-		{0x00,(0x14 << 3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
-		{0x00,(0x07 << 3)|0x1, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x07 << 3)|0x2, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-		{0x00,(0x01 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/msi/ms6119/romstage.c b/src/mainboard/msi/ms6119/romstage.c
deleted file mode 100644
index 1d34bd9cd0..0000000000
--- a/src/mainboard/msi/ms6119/romstage.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/winbond/common/winbond.h>
-#include <superio/winbond/w83977tf/w83977tf.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/msi/ms6147/Kconfig b/src/mainboard/msi/ms6147/Kconfig
deleted file mode 100644
index 250569a446..0000000000
--- a/src/mainboard/msi/ms6147/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_MSI_MS_6147
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_WINBOND_W83977TF
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default msi/ms6147
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "MS-6147"
-
-config IRQ_SLOT_COUNT
-	int
-	default 8
-
-endif # BOARD_MSI_MS_6147
diff --git a/src/mainboard/msi/ms6147/Kconfig.name b/src/mainboard/msi/ms6147/Kconfig.name
deleted file mode 100644
index a01b8c2efd..0000000000
--- a/src/mainboard/msi/ms6147/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_MSI_MS_6147
-	bool "MS-6147"
diff --git a/src/mainboard/msi/ms6147/board_info.txt b/src/mainboard/msi/ms6147/board_info.txt
deleted file mode 100644
index 5c4f8e8e03..0000000000
--- a/src/mainboard/msi/ms6147/board_info.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-Category: desktop
-Board URL: http://no.msi.com/product/mb/MS-6147.html
-ROM package: DIP32
-ROM protocol: Parallel
-ROM socketed: y
-Release year: 1999
diff --git a/src/mainboard/msi/ms6147/devicetree.cb b/src/mainboard/msi/ms6147/devicetree.cb
deleted file mode 100644
index 55f2745916..0000000000
--- a/src/mainboard/msi/ms6147/devicetree.cb
+++ /dev/null
@@ -1,60 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/winbond/w83977tf	# Super I/O
-          device pnp 3f0.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 3f0.1 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-            drq 0x74 = 3
-          end
-          device pnp 3f0.2 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 3f0.3 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 3f0.5 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1		# PS/2 keyboard interrupt
-            irq 0x72 = 12		# PS/2 mouse interrupt
-          end
-          device pnp 3f0.7 on		# GPIO 1
-          end
-          device pnp 3f0.8 on		# GPIO 2
-          end
-          device pnp 3f0.9 off		# GPIO 3
-          end
-          device pnp 3f0.a on		# ACPI
-          end
-        end
-      end
-      device pci 7.1 on end		# IDE
-      device pci 7.2 on end		# USB
-      device pci 7.3 on end		# ACPI
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "1"
-      register "ide0_drive1_udma33_enable" = "1"
-      register "ide1_drive0_udma33_enable" = "1"
-      register "ide1_drive1_udma33_enable" = "1"
-    end
-  end
-end
diff --git a/src/mainboard/msi/ms6147/irq_tables.c b/src/mainboard/msi/ms6147/irq_tables.c
deleted file mode 100644
index 46e32687e8..0000000000
--- a/src/mainboard/msi/ms6147/irq_tables.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Mats Erik Andersson <mats.andersson@gisladisker.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,
-	PIRQ_VERSION,
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router device */
-	0x1c00,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x20,			/* Checksum */
-	{
-		/* bus,       dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x0e << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x1, 0x0},
-		{0x00,(0x10 << 3)|0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0x0deb8}}, 0x2, 0x0},
-		{0x00,(0x12 << 3)|0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0x0deb8}}, 0x3, 0x0},
-		{0x00,(0x14 << 3)|0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0x0deb8}}, 0x4, 0x0},
-		{0x00,(0x00 << 3)|0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, /* North bridge */
-		{0x00,(0x07 << 3)|0x1, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, /* IDE */
-		{0x00,(0x07 << 3)|0x2, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0}, /* UHCI */
-		{0x00,(0x01 << 3)|0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0x0deb8}}, 0x0, 0x0}, /* AGP bridge */
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/msi/ms6147/romstage.c b/src/mainboard/msi/ms6147/romstage.c
deleted file mode 100644
index 6ac5ae169e..0000000000
--- a/src/mainboard/msi/ms6147/romstage.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Mats Erik Andersson <mats.andersson@gisladisker.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/winbond/common/winbond.h>
-#include <superio/winbond/w83977tf/w83977tf.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/msi/ms6156/Kconfig b/src/mainboard/msi/ms6156/Kconfig
deleted file mode 100644
index 9f3401f4ad..0000000000
--- a/src/mainboard/msi/ms6156/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_MSI_MS_6156
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_WINBOND_W83977TF
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default msi/ms6156
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "MS-6156"
-
-config IRQ_SLOT_COUNT
-	int
-	default 7
-
-endif # BOARD_MSI_MS_6156
diff --git a/src/mainboard/msi/ms6156/Kconfig.name b/src/mainboard/msi/ms6156/Kconfig.name
deleted file mode 100644
index e1f1882d3b..0000000000
--- a/src/mainboard/msi/ms6156/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_MSI_MS_6156
-	bool "MS-6156"
diff --git a/src/mainboard/msi/ms6156/board_info.txt b/src/mainboard/msi/ms6156/board_info.txt
deleted file mode 100644
index c28e680050..0000000000
--- a/src/mainboard/msi/ms6156/board_info.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-Category: desktop
-Board URL: http://no.msi.com/product/mb/MS-6156VA.html
-ROM package: DIP32
-ROM protocol: Parallel
-ROM socketed: y
-Flashrom support: y
-Release year: 1999
diff --git a/src/mainboard/msi/ms6156/devicetree.cb b/src/mainboard/msi/ms6156/devicetree.cb
deleted file mode 100644
index b9e3828424..0000000000
--- a/src/mainboard/msi/ms6156/devicetree.cb
+++ /dev/null
@@ -1,77 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-chip northbridge/intel/i440bx		# Northbridge
-	device cpu_cluster 0 on		# APIC cluster
-		chip cpu/intel/slot_1		# CPU
-			device lapic 0 on end		# APIC
-		end
-	end
-	device domain 0 on		# PCI domain
-		device pci 0.0 on end		# Host bridge
-		device pci 1.0 on end		# PCI/AGP bridge
-		chip southbridge/intel/i82371eb	# Southbridge
-			device pci 7.0 on			# ISA bridge
-				chip superio/winbond/w83977tf	# Super I/O
-					device pnp 3f0.0 on		# Floppy
-						io 0x60 = 0x3f0
-						irq 0x70 = 6
-						drq 0x74 = 2
-					end
-					device pnp 3f0.1 on		# Parallel port
-						io 0x60 = 0x378
-						irq 0x70 = 7
-						drq 0x74 = 3
-					end
-					device pnp 3f0.2 on		# COM1
-						io 0x60 = 0x3f8
-						irq 0x70 = 4
-					end
-					device pnp 3f0.3 on		# COM2 / IR
-						io 0x60 = 0x2f8
-						irq 0x70 = 3
-					end
-					device pnp 3f0.5 on		# PS/2 keyboard
-						io 0x60 = 0x60
-						io 0x62 = 0x64
-						irq 0x70 = 1		# PS/2 keyboard interrupt
-						irq 0x72 = 12		# PS/2 mouse interrupt
-					end
-					device pnp 3f0.7 off		# GPIO 1
-					end
-					device pnp 3f0.8 off		# GPIO 2
-					end
-					device pnp 3f0.9 off		# GPIO 3
-					end
-					device pnp 3f0.a off		# ACPI
-					end
-				end
-			end
-			device pci 7.1 on end		# IDE
-			device pci 7.2 on end		# USB
-			device pci 7.3 on end		# ACPI
-			device pci 14.0 on end		# Onboard audio (Ensoniq ES1371)
-			register "ide0_enable" = "1"
-			register "ide1_enable" = "1"
-			register "ide_legacy_enable" = "1"
-			# Enable UDMA/33 for higher speed if your IDE device(s) support it.
-			register "ide0_drive0_udma33_enable" = "1"
-			register "ide0_drive1_udma33_enable" = "1"
-			register "ide1_drive0_udma33_enable" = "1"
-			register "ide1_drive1_udma33_enable" = "1"
-		end
-	end
-end
diff --git a/src/mainboard/msi/ms6156/irq_tables.c b/src/mainboard/msi/ms6156/irq_tables.c
deleted file mode 100644
index e280d1739d..0000000000
--- a/src/mainboard/msi/ms6156/irq_tables.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,		/* u32 signature */
-	PIRQ_VERSION,		/* u16 version */
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router dev */
-	0x800,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0xb3,			/* Checksum */
-	{
-		/* bus,        dev | fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
-		{0x00, (0x0e << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x1, 0x0},
-		{0x00, (0x10 << 3) | 0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}}, 0x2, 0x0},
-		{0x00, (0x12 << 3) | 0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}}, 0x3, 0x0},
-		{0x00, (0x14 << 3) | 0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}}, 0x4, 0x0},
-		{0x00, (0x00 << 3) | 0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}}, 0x0, 0x0},
-		{0x00, (0x07 << 3) | 0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0},
-		{0x00, (0x01 << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/msi/ms6156/romstage.c b/src/mainboard/msi/ms6156/romstage.c
deleted file mode 100644
index 6a3b7f4c65..0000000000
--- a/src/mainboard/msi/ms6156/romstage.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/winbond/common/winbond.h>
-#include <superio/winbond/w83977tf/w83977tf.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/nokia/Kconfig b/src/mainboard/nokia/Kconfig
deleted file mode 100644
index 3ed77b46a9..0000000000
--- a/src/mainboard/nokia/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2010 Marc Bertens <mbertens@xs4all.nl>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if VENDOR_NOKIA
-
-choice
-	prompt "Mainboard model"
-
-source "src/mainboard/nokia/*/Kconfig.name"
-
-endchoice
-
-source "src/mainboard/nokia/*/Kconfig"
-
-config MAINBOARD_VENDOR
-	string
-	default "Nokia"
-
-endif # VENDOR_NOKIA
diff --git a/src/mainboard/nokia/Kconfig.name b/src/mainboard/nokia/Kconfig.name
deleted file mode 100644
index 64c55b0a34..0000000000
--- a/src/mainboard/nokia/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config VENDOR_NOKIA
-	bool "Nokia"
diff --git a/src/mainboard/nokia/ip530/Kconfig b/src/mainboard/nokia/ip530/Kconfig
deleted file mode 100644
index 5584988580..0000000000
--- a/src/mainboard/nokia/ip530/Kconfig
+++ /dev/null
@@ -1,43 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2010 Marc Bertens <mbertens@xs4all.nl>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_NOKIA_IP530
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SOCKET_PGA370
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_SMSC_SMSCSUPERIO
-	select SOUTHBRIDGE_TI_PCI1X2X
-	select DRIVERS_DEC_21143
-	select BOARD_ROMSIZE_KB_512
-	select PIRQ_ROUTE
-	select HAVE_PIRQ_TABLE
-	select SDRAMPWR_4DIMM
-
-config MAINBOARD_DIR
-	string
-	default nokia/ip530
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "IP530"
-
-config IRQ_SLOT_COUNT
-	int
-	default 22
-
-endif # BOARD_NOKIA_IP530
diff --git a/src/mainboard/nokia/ip530/Kconfig.name b/src/mainboard/nokia/ip530/Kconfig.name
deleted file mode 100644
index 22367d35ad..0000000000
--- a/src/mainboard/nokia/ip530/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_NOKIA_IP530
-	bool "IP530"
diff --git a/src/mainboard/nokia/ip530/board_info.txt b/src/mainboard/nokia/ip530/board_info.txt
deleted file mode 100644
index f9285bf9df..0000000000
--- a/src/mainboard/nokia/ip530/board_info.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-Category: server
-ROM package: TSOP48
-ROM protocol: Parallel
-ROM socketed: n
-Flashrom support: y
diff --git a/src/mainboard/nokia/ip530/devicetree.cb b/src/mainboard/nokia/ip530/devicetree.cb
deleted file mode 100644
index 8de81bbcf5..0000000000
--- a/src/mainboard/nokia/ip530/devicetree.cb
+++ /dev/null
@@ -1,112 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2010 Marc Bertens <mbertens@xs4all.nl>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# (L)APIC cluster
-    chip cpu/intel/socket_PGA370	# CPU socket
-      device lapic 0 on end		# Local APIC of the CPU
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci f.0 on
-        chip southbridge/ti/pci1x2x
-	     device pci 00.0 on
-			subsystemid 0x13b8 0x0000
-	     end
-	     register "scr" = "0x08449060"
-	     register "mrr" = "0x00007522"
-	end
-      end
-      device pci 7.0 on			# ISA bridge
-        chip superio/smsc/smscsuperio	# Super I/O (SMSC FDC37B787)
-          device pnp 3f0.0 off end	# Floppy (No connector)
-          device pnp 3f0.3 off end	# Parallel port (No connector)
-          device pnp 3f0.4 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 3f0.5 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 3f0.6 on		# RTC
-            irq 0x63 = 0x72
-          end
-          device pnp 3f0.7 off 		# PS/2 keyboard / mouse (No connector)
-          end
-          device pnp 3f0.8 on		# AUX I/O
-            irq 0x24 = 0x84		# OSC
-
-            irq 0xB2 = 0x0C		# Soft power status 1
-            irq 0xB3 = 0x05		# Soft power status 2
-            irq 0xC0 = 0x03		# IRQ MUX control
-
-            irq 0xC8 = 0x10		# GP50 = (I/O) output = Flashrom enable
-            irq 0xCA = 0x09		# GP52 = IRQ8 (output)
-            irq 0xCB = 0x01		# GP53 = nROMCS (output)
-            irq 0xCC = 0x11		# GP54 = (I/O) input
-            irq 0xF9 = 0x00             # read/write GP5x lines (0x1C)
-
-            irq 0xD0 = 0x08		# GP60 = IRQ1
-            irq 0xD1 = 0x08		# GP61 = IRQ3
-            irq 0xD2 = 0x08		# GP62 = IRQ4
-            irq 0xD3 = 0x11		# GP63 = (I/O) input = JP901 on board
-            irq 0xD4 = 0x11		# GP64 = (I/O) input
-            irq 0xD5 = 0x11		# GP65 = (I/O) input
-            irq 0xD6 = 0x08		# GP66 = IRQ8
-            irq 0xD7 = 0x11		# GP67 = (I/O) input
-            irq 0xFA = 0x00		# read/write GP6x lines (0x88)
-
-            irq 0xE0 = 0x00		# GP10 (I/O) = output
-            irq 0xE1 = 0x01		# GP11 (I/O) = input
-            irq 0xE2 = 0x08		# GP12 = P17
-            irq 0xE3 = 0x00		# GP13 (I/O) = output = LED fault on front, active low
-            irq 0xE4 = 0x00		# GP14 (I/O) = output
-            irq 0xE5 = 0x00		# GP15 (I/O) = output
-            irq 0xE6 = 0x01		# GP16 (I/O) = input = JP900 on board, low on short, high on open
-            irq 0xE7 = 0x00 		# GP17 (I/O) = output = LED alert on front, active low
-            irq 0xF6 = 0xFF		# read/write GP1x lines (0xCA)
-
-            irq 0xEF = 0x00		# GP_INT2 disable
-            irq 0xF0 = 0x00		# GP_INT1 disable
-            irq 0xF1 = 0x00		# WDT_UNITS
-            irq 0xF2 = 0x00		# WDT_VAL
-            irq 0xF3 = 0x00		# WDT_CFG
-            irq 0xF4 = 0x20		# WDT_CTRL (stop-cnt)
-          end
-          device pnp 3f0.a off 		# ACPI (No support yet)
-            # irq 0x60 = 0x0C
-            # irq 0x61 = 0x80
-          end
-        end
-      end
-      device pci 7.1 on end		# IDE
-      device pci 7.2 off end		# USB (No connector)
-      device pci 7.3 off end		# ACPI (No support yet)
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Disable UDMA/33 for lower speed if your IDE device(s) don't support it.
-      register "ide0_drive0_udma33_enable" = "1"
-      register "ide0_drive1_udma33_enable" = "1"
-      register "ide1_drive0_udma33_enable" = "1"
-      register "ide1_drive1_udma33_enable" = "1"
-    end
-  end
-end
diff --git a/src/mainboard/nokia/ip530/irq_tables.c b/src/mainboard/nokia/ip530/irq_tables.c
deleted file mode 100644
index f14fac2776..0000000000
--- a/src/mainboard/nokia/ip530/irq_tables.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Marc Bertens <mbertens@xs4all.nl>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-#define PIRQ_IRQ_MASK 0x0c60
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,		/* u32 signature */
-	PIRQ_VERSION,		/* u16 version */
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router dev */
-	0,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x122e,			/* Device */
-	0,			/* Miniport */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0xD7,			/* Checksum */
-	{
-		/**
-		 * Rebuild of the PIRQ table, to fix the non-working on-board NIC and PCMCIA controller.
-		 *          FEDCBA9876543210
-		 * 0x1E20 = 0001111000100000
-		 * 0x0C60 = 0000110001100000
-		 */
-		// Southbridge 82371EB, INTD = 0x63
-		{ 0x00, (0x07 << 3) | 0x0, {{0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}}, 0x0, 0x0 },
-		// On-board PCI-to-PCI bridge
-		{ 0x01, (0x00 << 3) | 0x0, {{0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}}, 0x0, 0x0 },
-		// ETH1 on front panel, INTA = 0x62 = ok
-		{ 0x00, (0x0d << 3) | 0x0, {{0x62, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}}, 0x0, 0x0 },
-
-		// ETH2 on front panel, 0x63
-		{ 0x00, (0x0e << 3) | 0x0, {{0x63, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}}, 0x0, 0x0 },
-		// ETH3 on front panel = 0x60
-		{ 0x02, (0x04 << 3) | 0x0, {{0x60, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}}, 0x0, 0x0 },
-
-		// ETH4 on front panel, INTA = 0x61 = ok
-		{ 0x02, (0x05 << 3) | 0x0, {{0x61, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}}, 0x0, 0x0 },
-		// PCMCIA/Cardbus controller, INTA = 0x60 = ok, INTB = 0x61 = ok
-		{ 0x00, (0x0f << 3) | 0x0, {{0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}, {0x00, PIRQ_IRQ_MASK}}, 0x0, 0x0 },
-		// Bridge for slot 1 (top)
-		{ 0x02, (0x07 << 3) | 0x0, {{0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}, {0x64, PIRQ_IRQ_MASK}}, 0x0, 0x0 },
-		// PCI compact slots 1 (top)
-		{ 0x03, (0x04 << 3) | 0x0, {{0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}}, 0x1, 0x0 },
-		{ 0x03, (0x05 << 3) | 0x0, {{0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}}, 0x2, 0x0 },
-		{ 0x03, (0x06 << 3) | 0x0, {{0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}}, 0x3, 0x0 },
-		{ 0x03, (0x07 << 3) | 0x0, {{0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}}, 0x4, 0x0 },
-		// Bridge for slot 2 (middle)
-		{ 0x02, (0x06 << 3) | 0x0, {{0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}}, 0x0, 0x0 },
-		// PCI compact slots 2 (middle)
-		{ 0x04, (0x04 << 3) | 0x0, {{0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}}, 0x5, 0x0 },
-		{ 0x04, (0x05 << 3) | 0x0, {{0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}}, 0x6, 0x0 },
-		{ 0x04, (0x06 << 3) | 0x0, {{0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}}, 0x7, 0x0 },
-		{ 0x04, (0x07 << 3) | 0x0, {{0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}}, 0x8, 0x0 },
-		// Bridge for slot 3 (bottom)
-		{ 0x00, (0x10 << 3) | 0x0, {{0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}}, 0x0, 0x0 },
-		// PCI compact slots 3 (bottom)
-		{ 0x05, (0x04 << 3) | 0x0, {{0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}}, 0x9, 0x0 },
-		{ 0x05, (0x05 << 3) | 0x0, {{0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}}, 0xA, 0x0 },
-		{ 0x05, (0x06 << 3) | 0x0, {{0x63, PIRQ_IRQ_MASK}, {0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}}, 0xB, 0x0 },
-		{ 0x05, (0x07 << 3) | 0x0, {{0x60, PIRQ_IRQ_MASK}, {0x61, PIRQ_IRQ_MASK}, {0x62, PIRQ_IRQ_MASK}, {0x63, PIRQ_IRQ_MASK}}, 0xC, 0x0 },
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
-
-/**
- * TODO: This stub function is here until the point is solved in the
- * main code of coreboot. See also arch/x86/boot/pirq_tables.c.
- */
-void pirq_assign_irqs(const unsigned char pIntAtoD[4])
-{
-	return;
-}
diff --git a/src/mainboard/nokia/ip530/romstage.c b/src/mainboard/nokia/ip530/romstage.c
deleted file mode 100644
index fa0585dbfe..0000000000
--- a/src/mainboard/nokia/ip530/romstage.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Marc Bertens <mbertens@xs4all.nl>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/smsc/smscsuperio/smscsuperio.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/soyo/Kconfig b/src/mainboard/soyo/Kconfig
deleted file mode 100644
index 76bf46d9a0..0000000000
--- a/src/mainboard/soyo/Kconfig
+++ /dev/null
@@ -1,30 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if VENDOR_SOYO
-
-choice
-	prompt "Mainboard model"
-
-source "src/mainboard/soyo/*/Kconfig.name"
-
-endchoice
-
-source "src/mainboard/soyo/*/Kconfig"
-
-config MAINBOARD_VENDOR
-	string
-	default "Soyo"
-
-endif # VENDOR_SOYO
diff --git a/src/mainboard/soyo/Kconfig.name b/src/mainboard/soyo/Kconfig.name
deleted file mode 100644
index 33f29fffbf..0000000000
--- a/src/mainboard/soyo/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config VENDOR_SOYO
-	bool "Soyo"
diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig b/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig
deleted file mode 100644
index 0a478995d3..0000000000
--- a/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig
+++ /dev/null
@@ -1,39 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_SOYO_SY_6BA_PLUS_III
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_ITE_IT8671F
-	select HAVE_PIRQ_TABLE
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default soyo/sy-6ba-plus-iii
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "SY-6BA+ III"
-
-config IRQ_SLOT_COUNT
-	int
-	default 7
-
-endif # BOARD_SOYO_SY_6BA_PLUS_III
diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig.name b/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig.name
deleted file mode 100644
index 05f55a183f..0000000000
--- a/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_SOYO_SY_6BA_PLUS_III
-	bool "SY-6BA+ III"
diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/board_info.txt b/src/mainboard/soyo/sy-6ba-plus-iii/board_info.txt
deleted file mode 100644
index 25ff69836d..0000000000
--- a/src/mainboard/soyo/sy-6ba-plus-iii/board_info.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-Category: desktop
-ROM package: DIP32
-ROM protocol: Parallel
-ROM socketed: y
-Flashrom support: y
diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb b/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb
deleted file mode 100644
index 274d6a9d23..0000000000
--- a/src/mainboard/soyo/sy-6ba-plus-iii/devicetree.cb
+++ /dev/null
@@ -1,69 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/ite/it8671f	# Super I/O
-          device pnp 370.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 370.1 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 370.2 on		# COM2
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 370.3 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-          end
-          device pnp 370.5 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1
-          end
-          device pnp 370.6 on           # PS/2 mouse
-            irq 0x70 = 12
-          end
-        end
-      end
-      device pci 7.1 on	end		# IDE
-      device pci 7.2 on	end		# USB
-      device pci 7.3 on end		# ACPI
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "0"
-      register "ide0_drive1_udma33_enable" = "0"
-      register "ide1_drive0_udma33_enable" = "0"
-      register "ide1_drive1_udma33_enable" = "0"
-    end
-  end
-end
diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c b/src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c
deleted file mode 100644
index f6b5ce7455..0000000000
--- a/src/mainboard/soyo/sy-6ba-plus-iii/irq_tables.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,		/* u32 signature */
-	PIRQ_VERSION,		/* u16 version */
-	32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
-	0x00,			/* Interrupt router bus */
-	(0x07 << 3) | 0x0,	/* Interrupt router dev */
-	0xc00,			/* IRQs devoted exclusively to PCI usage */
-	0x8086,			/* Vendor */
-	0x7000,			/* Device */
-	0,			/* Miniport */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x9c,			/* Checksum (has to be set to some value that
-				 * would give 0 after the sum of all bytes
-				 * for this structure (including checksum).
-				 */
-	{
-		/* bus,        dev | fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
-		{0x00, (0x0f << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x1, 0x0},
-		{0x00, (0x10 << 3) | 0x0, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}}, 0x2, 0x0},
-		{0x00, (0x11 << 3) | 0x0, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}}, 0x3, 0x0},
-		{0x00, (0x12 << 3) | 0x0, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}}, 0x4, 0x0},
-		{0x00, (0x13 << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x5, 0x0},
-		{0x00, (0x07 << 3) | 0x1, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0},
-		{0x00, (0x01 << 3) | 0x0, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x0, 0x0},
-	}
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
deleted file mode 100644
index 0bb1ab2552..0000000000
--- a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/ite/it8671f/it8671f.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x370, IT8671F_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	it8671f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
diff --git a/src/mainboard/tyan/s1846/Kconfig b/src/mainboard/tyan/s1846/Kconfig
deleted file mode 100644
index b76d36651c..0000000000
--- a/src/mainboard/tyan/s1846/Kconfig
+++ /dev/null
@@ -1,34 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-if BOARD_TYAN_S1846
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_INTEL_SLOT_1
-	select NORTHBRIDGE_INTEL_I440BX
-	select LATE_CBMEM_INIT
-	select SOUTHBRIDGE_INTEL_I82371EB
-	select SUPERIO_NSC_PC87309
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default tyan/s1846
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "S1846"
-
-endif # BOARD_TYAN_S1846
diff --git a/src/mainboard/tyan/s1846/Kconfig.name b/src/mainboard/tyan/s1846/Kconfig.name
deleted file mode 100644
index 2b68f27db0..0000000000
--- a/src/mainboard/tyan/s1846/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_TYAN_S1846
-	bool "S1846 (Tsunami ATX)"
diff --git a/src/mainboard/tyan/s1846/board_info.txt b/src/mainboard/tyan/s1846/board_info.txt
deleted file mode 100644
index 23a200f23e..0000000000
--- a/src/mainboard/tyan/s1846/board_info.txt
+++ /dev/null
@@ -1,8 +0,0 @@
-Board name: Tsunami ATX (S1846)
-Category: desktop
-Board URL: http://www.tyan.com/archive/products/html/tsunamiatx.html
-ROM package: DIP32
-ROM protocol: Parallel
-ROM socketed: y
-Flashrom support: y
-Release year: 1998
diff --git a/src/mainboard/tyan/s1846/devicetree.cb b/src/mainboard/tyan/s1846/devicetree.cb
deleted file mode 100644
index f774d4f494..0000000000
--- a/src/mainboard/tyan/s1846/devicetree.cb
+++ /dev/null
@@ -1,55 +0,0 @@
-chip northbridge/intel/i440bx		# Northbridge
-  device cpu_cluster 0 on		# APIC cluster
-    chip cpu/intel/slot_1		# CPU
-      device lapic 0 on end		# APIC
-    end
-  end
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    device pci 1.0 on end		# PCI/AGP bridge
-    chip southbridge/intel/i82371eb	# Southbridge
-      device pci 7.0 on			# ISA bridge
-        chip superio/nsc/pc87309	# Super I/O
-          device pnp 2e.0 on		# Floppy
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 2e.1 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-          end
-          device pnp 2e.2 on		# COM2 / IR
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 2e.3 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 2e.4 on		# Power management
-          end
-          device pnp 2e.5 on		# PS/2 mouse
-            irq 0x70 = 12
-          end
-          device pnp 2e.6 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1
-          end
-        end
-      end
-      device pci 7.1 on	end		# IDE
-      device pci 7.2 on	end		# USB
-      device pci 7.3 on end		# ACPI
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "1"
-      register "ide_legacy_enable" = "1"
-      # Enable UDMA/33 for higher speed if your IDE device(s) support it.
-      register "ide0_drive0_udma33_enable" = "0"
-      register "ide0_drive1_udma33_enable" = "0"
-      register "ide1_drive0_udma33_enable" = "0"
-      register "ide1_drive1_udma33_enable" = "0"
-    end
-  end
-end
diff --git a/src/mainboard/tyan/s1846/romstage.c b/src/mainboard/tyan/s1846/romstage.c
deleted file mode 100644
index 28aac5dc20..0000000000
--- a/src/mainboard/tyan/s1846/romstage.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <device/pci_def.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include <southbridge/intel/i82371eb/i82371eb.h>
-#include <northbridge/intel/i440bx/raminit.h>
-#include <cpu/x86/bist.h>
-#include <cpu/intel/romstage.h>
-#include <superio/nsc/pc87309/pc87309.h>
-#include <lib.h>
-
-#define SERIAL_DEV PNP_DEV(0x2e, PC87309_SP1)
-
-int spd_read_byte(unsigned int device, unsigned int address)
-{
-	return smbus_read_byte(device, address);
-}
-
-void mainboard_romstage_entry(unsigned long bist)
-{
-	pc87309_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-
-	enable_smbus();
-	sdram_initialize();
-}
author	Kyösti Mälkki <kyosti.malkki@gmail.com>	2018-01-17 15:27:18 +0200
committer	Kyösti Mälkki <kyosti.malkki@gmail.com>	2018-01-18 20:46:48 +0000
commit	8f274e147a24f0b877420dc045625e47705b4ed9 (patch)
tree	6881b0c20bbf93769d749a8dbe5dc4d8513ef75e /src
parent	4c65398c10fa4583ad6b83ddc7f7873625a6ddbf (diff)
download	coreboot-8f274e147a24f0b877420dc045625e47705b4ed9.tar.xz