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| author | Ronald G. Minnich <Ronald G. Minnich> | 2006-09-13 04:33:07 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2006-09-13 04:33:07 +0000 |
| commit | 9cf0050d68f5dfc2e88a532844784bd5993fbac6 (patch) | |
| tree | b35548eace887a1f0ade7b8a90f8170a91e47d67 /src | |
| parent | 9cf642bad3fdd2205ffdd83a3222a39855b1ceff (diff) | |
| download | coreboot-9cf0050d68f5dfc2e88a532844784bd5993fbac6.tar.xz | |
Slow down the clock, per Tom Sylla
Signed-off-by: Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2406 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/amd/gx2/pll_reset.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/gx2/pll_reset.c b/src/northbridge/amd/gx2/pll_reset.c index 2437647c59..bac0e34525 100644 --- a/src/northbridge/amd/gx2/pll_reset.c +++ b/src/northbridge/amd/gx2/pll_reset.c @@ -126,7 +126,7 @@ static unsigned int get_memory_speed(void) #define DEFAULT_MDIV 3 #define DEFAULT_VDIV 2 -#define DEFAULT_FBDIV 24 // 400/266 018 ;300/200 +#define DEFAULT_FBDIV 22 // 366/244 ; 24 400/266 018 ;300/200 static void pll_reset(void) { |