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authorElyes HAOUAS <ehaouas@noos.fr>2020-08-11 09:39:43 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-08-17 07:00:37 +0000
commita4dd33cc8b52f686908590bb41b1c69a9b6c5db5 (patch)
tree95cf94c3ff438647096ff3300f0972b2f5b797e3 /src
parenta3022056a2d16b92cc0cdf5eafa4e6369c09e716 (diff)
downloadcoreboot-a4dd33cc8b52f686908590bb41b1c69a9b6c5db5.tar.xz
src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers
Change-Id: Id3390c5ac6a9517ffc2d202f41802e6f4d2e314c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44371 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/drivers/aspeed/common/ast_main.c5
-rw-r--r--src/drivers/aspeed/common/ast_mode_corebootfb.c3
-rw-r--r--src/drivers/uart/oxpcie.c2
-rw-r--r--src/northbridge/intel/pineview/gma.c7
-rw-r--r--src/southbridge/intel/bd82x6x/smbus.c5
-rw-r--r--src/southbridge/intel/common/pciehp.c3
-rw-r--r--src/southbridge/intel/i82801gx/smbus.c9
-rw-r--r--src/southbridge/intel/i82801gx/usb_ehci.c3
-rw-r--r--src/southbridge/intel/i82801ix/smbus.c5
-rw-r--r--src/southbridge/intel/i82801jx/smbus.c9
-rw-r--r--src/southbridge/intel/ibexpeak/smbus.c5
-rw-r--r--src/southbridge/intel/ibexpeak/thermal.c3
12 files changed, 35 insertions, 24 deletions
diff --git a/src/drivers/aspeed/common/ast_main.c b/src/drivers/aspeed/common/ast_main.c
index 5143e6d0eb..8ed1eaa803 100644
--- a/src/drivers/aspeed/common/ast_main.c
+++ b/src/drivers/aspeed/common/ast_main.c
@@ -4,6 +4,7 @@
*/
#include <delay.h>
+#include <device/pci_def.h>
#include "ast_drv.h"
#include "ast_dram_tables.h"
@@ -329,7 +330,7 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags)
ast->dev = dev;
/* PCI BAR 1 */
- res = find_resource(dev->pdev, 0x14);
+ res = find_resource(dev->pdev, PCI_BASE_ADDRESS_1);
if (!res) {
dev_err(dev->pdev, "BAR1 resource not found.\n");
ret = -EIO;
@@ -343,7 +344,7 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags)
/* PCI BAR 2 */
ast->io_space_uses_mmap = false;
- res = find_resource(dev->pdev, 0x18);
+ res = find_resource(dev->pdev, PCI_BASE_ADDRESS_2);
if (!res) {
dev_err(dev->pdev, "BAR2 resource not found.\n");
ret = -EIO;
diff --git a/src/drivers/aspeed/common/ast_mode_corebootfb.c b/src/drivers/aspeed/common/ast_mode_corebootfb.c
index 2a033a028b..8418b010f3 100644
--- a/src/drivers/aspeed/common/ast_mode_corebootfb.c
+++ b/src/drivers/aspeed/common/ast_mode_corebootfb.c
@@ -3,6 +3,7 @@
* Copied from Linux drivers/gpu/drm/ast/ast_mode.c
*/
#include <edid.h>
+#include <device/pci_def.h>
#include "ast_drv.h"
@@ -18,7 +19,7 @@ int ast_crtc_do_set_base(struct drm_crtc *crtc)
struct drm_framebuffer *fb = crtc->primary->fb;
/* PCI BAR 0 */
- struct resource *res = find_resource(crtc->dev->pdev, 0x10);
+ struct resource *res = find_resource(crtc->dev->pdev, PCI_BASE_ADDRESS_0);
if (!res) {
printk(BIOS_ERR, "BAR0 resource not found.\n");
return -EIO;
diff --git a/src/drivers/uart/oxpcie.c b/src/drivers/uart/oxpcie.c
index d8a8b9167e..17e0d26a0c 100644
--- a/src/drivers/uart/oxpcie.c
+++ b/src/drivers/uart/oxpcie.c
@@ -12,7 +12,7 @@ static void oxford_oxpcie_enable(struct device *dev)
{
printk(BIOS_DEBUG, "Initializing Oxford OXPCIe952\n");
- struct resource *res = find_resource(dev, 0x10);
+ struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (!res) {
printk(BIOS_WARNING, "OXPCIe952: No UART resource found.\n");
return;
diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c
index e46bd7c7c2..e0ed0f0500 100644
--- a/src/northbridge/intel/pineview/gma.c
+++ b/src/northbridge/intel/pineview/gma.c
@@ -6,6 +6,7 @@
#include <delay.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <drivers/intel/gma/i915_reg.h>
@@ -234,9 +235,9 @@ static void gma_func0_init(struct device *dev)
int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
/* Find base addresses */
- mmio_res = find_resource(dev, 0x10);
- gtt_res = find_resource(dev, 0x1c);
- pio_res = find_resource(dev, 0x14);
+ mmio_res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ gtt_res = find_resource(dev, PCI_BASE_ADDRESS_3);
+ pio_res = find_resource(dev, PCI_BASE_ADDRESS_1);
physbase = pci_read_config32(dev, 0x5c) & ~0xf;
if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base) {
diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 7a00cf456f..b251596667 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -4,6 +4,7 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
@@ -34,7 +35,7 @@ static int lsmbus_read_byte(struct device *dev, u8 address)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_read_byte(res->base, device, address);
}
@@ -47,7 +48,7 @@ static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_write_byte(res->base, device, address, val);
}
diff --git a/src/southbridge/intel/common/pciehp.c b/src/southbridge/intel/common/pciehp.c
index 5556aba3a0..247bf5df7f 100644
--- a/src/southbridge/intel/common/pciehp.c
+++ b/src/southbridge/intel/common/pciehp.c
@@ -5,6 +5,7 @@
#include <acpi/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include "pciehp.h"
@@ -121,7 +122,7 @@ static void slot_dev_read_resources(struct device *dev)
{
struct resource *resource;
- resource = new_resource(dev, 0x10);
+ resource = new_resource(dev, PCI_BASE_ADDRESS_0);
resource->size = 1 << 23;
resource->align = 22;
resource->gran = 22;
diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c
index 6b63959d6a..9624b9862f 100644
--- a/src/southbridge/intel/i82801gx/smbus.c
+++ b/src/southbridge/intel/i82801gx/smbus.c
@@ -4,6 +4,7 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/smbus_host.h>
#include "i82801gx.h"
@@ -16,7 +17,7 @@ static int lsmbus_read_byte(struct device *dev, u8 address)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_read_byte(res->base, device, address);
}
@@ -29,7 +30,7 @@ static int lsmbus_write_byte(struct device *dev, u8 address, u8 data)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_write_byte(res->base, device, address, data);
}
@@ -41,7 +42,7 @@ static int lsmbus_block_write(struct device *dev, u8 cmd, u8 bytes, const u8 *bu
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_block_write(res->base, device, cmd, bytes, buf);
}
@@ -53,7 +54,7 @@ static int lsmbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buf)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_block_read(res->base, device, cmd, bytes, buf);
}
diff --git a/src/southbridge/intel/i82801gx/usb_ehci.c b/src/southbridge/intel/i82801gx/usb_ehci.c
index 0a66136d03..b01af96c60 100644
--- a/src/southbridge/intel/i82801gx/usb_ehci.c
+++ b/src/southbridge/intel/i82801gx/usb_ehci.c
@@ -7,6 +7,7 @@
#include "i82801gx.h"
#include <device/pci_ehci.h>
#include <device/mmio.h>
+#include <device/pci_def.h>
#include <device/pci_ops.h>
static void usb_ehci_init(struct device *dev)
@@ -23,7 +24,7 @@ static void usb_ehci_init(struct device *dev)
pci_update_config32(dev, 0xfc, ~(3 << 2), (2 << 2) | (1 << 29) | (1 << 17));
/* Clear any pending port changes */
- res = find_resource(dev, 0x10);
+ res = find_resource(dev, PCI_BASE_ADDRESS_0);
base = res2mmio(res, 0, 0);
reg32 = read32(base + 0x24) | (1 << 2);
write32(base + 0x24, reg32);
diff --git a/src/southbridge/intel/i82801ix/smbus.c b/src/southbridge/intel/i82801ix/smbus.c
index 815705d20a..72c3110990 100644
--- a/src/southbridge/intel/i82801ix/smbus.c
+++ b/src/southbridge/intel/i82801ix/smbus.c
@@ -4,6 +4,7 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
@@ -23,7 +24,7 @@ static int lsmbus_read_byte(struct device *dev, u8 address)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_read_byte(res->base, device, address);
}
@@ -36,7 +37,7 @@ static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_write_byte(res->base, device, address, val);
}
diff --git a/src/southbridge/intel/i82801jx/smbus.c b/src/southbridge/intel/i82801jx/smbus.c
index 65956353da..c92a2864a0 100644
--- a/src/southbridge/intel/i82801jx/smbus.c
+++ b/src/southbridge/intel/i82801jx/smbus.c
@@ -4,6 +4,7 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
@@ -23,7 +24,7 @@ static int lsmbus_read_byte(struct device *dev, u8 address)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_read_byte(res->base, device, address);
}
@@ -36,7 +37,7 @@ static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_write_byte(res->base, device, address, val);
}
@@ -50,7 +51,7 @@ static int lsmbus_block_write(struct device *dev, u8 cmd, u8 bytes,
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_block_write(res->base, device, cmd, bytes, buf);
}
@@ -62,7 +63,7 @@ static int lsmbus_block_read(struct device *dev, u8 cmd, u8 bytes, u8 *buf)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_block_read(res->base, device, cmd, bytes, buf);
}
diff --git a/src/southbridge/intel/ibexpeak/smbus.c b/src/southbridge/intel/ibexpeak/smbus.c
index 01001c3bb5..7c9ac8240d 100644
--- a/src/southbridge/intel/ibexpeak/smbus.c
+++ b/src/southbridge/intel/ibexpeak/smbus.c
@@ -4,6 +4,7 @@
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
@@ -33,7 +34,7 @@ static int lsmbus_read_byte(struct device *dev, u8 address)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_read_byte(res->base, device, address);
}
@@ -46,7 +47,7 @@ static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
device = dev->path.i2c.device;
pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, 0x20);
+ res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
return do_smbus_write_byte(res->base, device, address, val);
}
diff --git a/src/southbridge/intel/ibexpeak/thermal.c b/src/southbridge/intel/ibexpeak/thermal.c
index 0b496dae55..142d3c7d6d 100644
--- a/src/southbridge/intel/ibexpeak/thermal.c
+++ b/src/southbridge/intel/ibexpeak/thermal.c
@@ -3,6 +3,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include <device/pci_ids.h>
#include "pch.h"
#include <device/mmio.h>
@@ -13,7 +14,7 @@ static void thermal_init(struct device *dev)
u8 *base;
printk(BIOS_DEBUG, "Thermal init start.\n");
- res = find_resource(dev, 0x10);
+ res = find_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;