diff options
| author | Aamir Bohra <aamir.bohra@intel.com> | 2020-03-12 21:37:25 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-18 16:46:04 +0000 |
| commit | b0b32196660c8866a42cff3445ed16a9429c65c1 (patch) | |
| tree | 189dcc8dd566ba6ef569ded0e665185f4f9ec462 /src | |
| parent | 223a30ce11b94fa12b610e23cdb88064f652920a (diff) | |
| download | coreboot-b0b32196660c8866a42cff3445ed16a9429c65c1.tar.xz | |
mb/google/dedede: Support integratred BT enumeration
The integrated BT is routed via USB2 port 8, add USB configuration
to support integrated BT enumeration.
Change-Id: I46d8c92ba57cd72a91ee15ef4d11f07824c29e9a
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39471
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/dedede/variants/baseboard/devicetree.cb | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 9a8ad66cdd..ece9672ae8 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -31,10 +31,10 @@ chip soc/intel/tigerlake register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Port C1 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0 register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A1 - register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth + register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Discrete Bluetooth register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Not Used register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Not Used - register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Not Used + register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Integrated Bluetooth register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type-C Port C0 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type-C Port C1 @@ -190,12 +190,18 @@ chip soc/intel/tigerlake device usb 2.3 on end end chip drivers/usb/acpi - register "desc" = ""Bluetooth"" + register "desc" = ""Discrete Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H19)" device usb 2.4 on end end chip drivers/usb/acpi + register "desc" = ""Integrated Bluetooth"" + register "type" = "UPC_TYPE_INTERNAL" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H19)" + device usb 2.7 on end + end + chip drivers/usb/acpi register "desc" = ""Left Type-C Port"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(1, 1)" |