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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-06-17 12:42:53 +0200 |
---|---|---|
committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-06-18 10:43:35 +0000 |
commit | b0bbafe5ad3c8a300ceedab9ad607c789d20fc59 (patch) | |
tree | cd006b42c5075e38ad496d13f3721e360cbf8ae4 /src | |
parent | 917420f7e8ca9047ef639fe8b642ebcc128e62d1 (diff) | |
download | coreboot-b0bbafe5ad3c8a300ceedab9ad607c789d20fc59.tar.xz |
soc/intel/skylake: Select microcode updates depending on discrete PCH
Change-Id: I05e97484605306afc70c726187bda8091216c9cc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index e9f555f13c..129586a233 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -81,15 +81,17 @@ postcar-y += spi.c postcar-y += i2c.c postcar-y += uart.c - -# Skylake D0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_406ex/microcode.bin +ifeq ($(CONFIG_SKYLAKE_SOC_PCH_H),y) # Skylake H Q0 cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_506ex/microcode.bin -# Kabylake H0, Y0 -cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin # Kabylake HB0 cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_906ex/microcode.bin +else +# Skylake D0 +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_406ex/microcode.bin +# Kabylake H0, Y0 +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin +endif # Missing for Skylake C0 (0x406e2), Kabylake G0 (0x406e8), Kabylake HA0 (0x506e8) # since those are probably pre-release samples. |