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authorDennis Wassenberg <dennis.wassenberg@secunet.com>2016-11-02 08:12:52 +0100
committerNico Huber <nico.h@gmx.de>2016-12-08 01:35:42 +0100
commitbd202bcdf35ee7fab0b17d9cc49a465a4a90e829 (patch)
tree6861533e4b2274f076ce8589332bc1714f26e473 /src
parent0c04720cb764bc21e15f85bc4e0ae3310f933ae3 (diff)
downloadcoreboot-bd202bcdf35ee7fab0b17d9cc49a465a4a90e829.tar.xz
nb/intel/sandybridge: Lock PAVPC
This makes CHIPSEC happy. We don't enable PAVP, but it shouldn't hurt to lock it nevertheless. Change-Id: I9428f0b6e8868832eb79f7aea24cbc7961c2aa8f Signed-off-by: Dennis Wassenberg <dennis.wassenberg@secunet.com> Reviewed-on: https://review.coreboot.org/17352 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/sandybridge/finalize.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/finalize.c b/src/northbridge/intel/sandybridge/finalize.c
index 93f62611b0..21bf9da332 100644
--- a/src/northbridge/intel/sandybridge/finalize.c
+++ b/src/northbridge/intel/sandybridge/finalize.c
@@ -23,6 +23,7 @@
void intel_sandybridge_finalize_smm(void)
{
pci_or_config16(PCI_DEV_SNB, 0x50, 1 << 0); /* GGC */
+ pci_or_config16(PCI_DEV_SNB, 0x58, 1 << 2); /* PAVP Lock */
pci_or_config32(PCI_DEV_SNB, 0x5c, 1 << 0); /* DPR */
pci_or_config32(PCI_DEV_SNB, 0x78, 1 << 10); /* ME */
pci_or_config32(PCI_DEV_SNB, 0x90, 1 << 0); /* REMAPBASE */