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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-05-01 16:12:09 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-05-07 20:00:25 +0000 |
| commit | bd909ad437931dd9222daa1c1a98c9d5e0e7efac (patch) | |
| tree | 8bef52e03a590d70b9806bf02088d642b7ae74d1 /src | |
| parent | 36d50f8050d18631ef28a9af6760a2fa5d23de63 (diff) | |
| download | coreboot-bd909ad437931dd9222daa1c1a98c9d5e0e7efac.tar.xz | |
nb/intel/e7505: Fix for RESOURCE_ALLOCATOR_V4
Memory region 0xa0000 to 0xc0000 was not reserved, the first
PCI memory resources might get assigned in this space.
FIXES: aopen/dxplplusu PCI EHCI 0:1d.7 memory resource.
Change-Id: Ia17025bde83b91d71ad719de6348197cf92e267e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52813
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/intel/e7505/northbridge.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c index fc771b3c3a..4908ecd7a4 100644 --- a/src/northbridge/intel/e7505/northbridge.c +++ b/src/northbridge/intel/e7505/northbridge.c @@ -46,8 +46,8 @@ static void mch_domain_read_resources(struct device *dev) /* Report the memory regions */ idx = 10; - ram_resource(dev, idx++, 0, 640); - ram_resource(dev, idx++, 768, tolmk - 768); + ram_resource(dev, idx++, 0, tolmk); + mmio_resource(dev, idx++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB); if (tomk > basek_4G) ram_resource(dev, idx++, basek_4G, tomk - basek_4G); |