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authorUwe Hermann <uwe@hermann-uwe.de>2010-10-04 20:43:55 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-10-04 20:43:55 +0000
commitcc0dc7f839f5ccc3361e186f6bbc4c9a48155c78 (patch)
tree0fbcf95cc8b393ccd6738020c951c205f586b374 /src
parent36455aade46a1ca44aa1387e1785e72519f7b82d (diff)
downloadcoreboot-cc0dc7f839f5ccc3361e186f6bbc4c9a48155c78.tar.xz
Add missing Intel Pentium II/III era CPU IDs.
Add links to the respective Intel specification updates or manuals where the IDs are listed. Mention the possible core steppings of each CPU ID. There are duplicate IDs in model_6xx and model_68x for now, not sure if those should be eliminated, but there were already duplicates before this patch, so that's probably an extra issue to look into. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/cpu/intel/model_68x/model_68x_init.c18
-rw-r--r--src/cpu/intel/model_6bx/model_6bx_init.c11
-rw-r--r--src/cpu/intel/model_6xx/model_6xx_init.c67
3 files changed, 82 insertions, 14 deletions
diff --git a/src/cpu/intel/model_68x/model_68x_init.c b/src/cpu/intel/model_68x/model_68x_init.c
index 0cb7b415a0..7244693452 100644
--- a/src/cpu/intel/model_68x/model_68x_init.c
+++ b/src/cpu/intel/model_68x/model_68x_init.c
@@ -100,8 +100,26 @@ static struct device_operations cpu_dev_ops = {
.init = model_68x_init,
};
+/*
+ * Intel Celeron Processor Identification Information
+ * http://www.intel.com/design/celeron/qit/update.pdf
+ *
+ * Intel Pentium III Processor Identification and Package Information
+ * http://www.intel.com/design/pentiumiii/qit/update.pdf
+ *
+ * Intel Pentium III Processor Specification Update
+ * http://download.intel.com/design/intarch/specupdt/24445358.pdf
+ *
+ * Mobile Intel Pentium III/III-M Processor Specification Update
+ * http://download.intel.com/design/intarch/specupdt/24530663.pdf
+ */
static struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x0680 },
+ { X86_VENDOR_INTEL, 0x0681 }, /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */
+ { X86_VENDOR_INTEL, 0x0683 }, /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/
+ { X86_VENDOR_INTEL, 0x0686 }, /* PIII/Celeron, cC0/C0/BC0/PC0/MC0 */
+ { X86_VENDOR_INTEL, 0x068a }, /* PIII/Celeron, cD0/D0/BD0/PD0 */
+
{ 0, 0 },
};
diff --git a/src/cpu/intel/model_6bx/model_6bx_init.c b/src/cpu/intel/model_6bx/model_6bx_init.c
index 89807cbe0e..a8883ecc65 100644
--- a/src/cpu/intel/model_6bx/model_6bx_init.c
+++ b/src/cpu/intel/model_6bx/model_6bx_init.c
@@ -86,9 +86,16 @@ static struct device_operations cpu_dev_ops = {
.init = model_6bx_init,
};
+/*
+ * Pentium III Processor Identification and Package Information.
+ * http://www.intel.com/design/pentiumiii/qit/update.pdf
+ *
+ * Intel Pentium III Processor Specification Update
+ * http://download.intel.com/design/intarch/specupdt/24445358.pdf
+ */
static struct cpu_device_id cpu_table[] = {
- { X86_VENDOR_INTEL, 0x06B1 },
- { X86_VENDOR_INTEL, 0x06B4 }, /* Low Voltage PIII Micro-FCBGA Socket 479 */
+ { X86_VENDOR_INTEL, 0x06b1 }, /* Pentium III/Celeron, tA1/A1/FPA1 */
+ { X86_VENDOR_INTEL, 0x06b4 }, /* Pentium III, tB1/FPB1 */
{ 0, 0 },
};
diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c
index fc61312a2e..712cd0508d 100644
--- a/src/cpu/intel/model_6xx/model_6xx_init.c
+++ b/src/cpu/intel/model_6xx/model_6xx_init.c
@@ -51,20 +51,63 @@ static void model_6xx_init(device_t dev)
static struct device_operations cpu_dev_ops = {
.init = model_6xx_init,
};
+
+/*
+ * Intel Pentium Pro Processor Specification Update
+ * http://download.intel.com/design/archives/processors/pro/docs/24268935.pdf
+ *
+ * Intel Pentium II Processor Specification Update
+ * http://download.intel.com/design/PentiumII/specupdt/24333749.pdf
+ *
+ * Mobile Intel Pentium II Processor Specification Update
+ * http://download.intel.com/design/intarch/specupdt/24388757.pdf
+ *
+ * Intel Celeron Processor Identification Information
+ * http://www.intel.com/design/celeron/qit/update.pdf
+ *
+ * Intel Pentium II Xeon Processor Specification Update
+ * http://download.intel.com/support/processors/pentiumii/xeon/24377632.pdf
+ *
+ * Intel Pentium III Processor Identification and Package Information
+ * http://www.intel.com/design/pentiumiii/qit/update.pdf
+ *
+ * Intel Pentium III Processor Specification Update
+ * http://download.intel.com/design/intarch/specupdt/24445358.pdf
+ *
+ * Mobile Intel Pentium III/III-M Processor Specification Update
+ * http://download.intel.com/design/intarch/specupdt/24530663.pdf
+ */
static struct cpu_device_id cpu_table[] = {
- { X86_VENDOR_INTEL, 0x0650 },
- { X86_VENDOR_INTEL, 0x0652 },
- { X86_VENDOR_INTEL, 0x0660 }, /* Celeron (Mendocino) */
- { X86_VENDOR_INTEL, 0x0665 },
- { X86_VENDOR_INTEL, 0x0672 },
- { X86_VENDOR_INTEL, 0x0673 },
+ { X86_VENDOR_INTEL, 0x0611 }, /* Pentium Pro, B0 */
+ { X86_VENDOR_INTEL, 0x0612 }, /* Pentium Pro, C0 */
+ { X86_VENDOR_INTEL, 0x0616 }, /* Pentium Pro, sA0 */
+ { X86_VENDOR_INTEL, 0x0617 }, /* Pentium Pro, sA1 */
+ { X86_VENDOR_INTEL, 0x0619 }, /* Pentium Pro, sB1 */
+
+ { X86_VENDOR_INTEL, 0x0633 }, /* PII, C0 */
+ { X86_VENDOR_INTEL, 0x0634 }, /* PII, C1 */
+
+ { X86_VENDOR_INTEL, 0x0650 }, /* PII/Celeron, dA0/mdA0/A0 */
+ { X86_VENDOR_INTEL, 0x0651 }, /* PII/Celeron, dA1/A1 */
+ { X86_VENDOR_INTEL, 0x0652 }, /* PII/Celeron/Xeon, dB0/mdB0/B0 */
+ { X86_VENDOR_INTEL, 0x0653 }, /* PII/Xeon, dB1/B1 */
+
+ { X86_VENDOR_INTEL, 0x0660 }, /* Celeron, A0 */
+ { X86_VENDOR_INTEL, 0x0665 }, /* Celeron, B0 */
+ { X86_VENDOR_INTEL, 0x066a }, /* PII, mdxA0/dmmA0 + others */
+
+ { X86_VENDOR_INTEL, 0x0672 }, /* PIII, kB0 */
+ { X86_VENDOR_INTEL, 0x0673 }, /* PIII, kC0 */
+
{ X86_VENDOR_INTEL, 0x0680 },
- { X86_VENDOR_INTEL, 0x0681 },
- { X86_VENDOR_INTEL, 0x0683 },
- { X86_VENDOR_INTEL, 0x0686 },
- { X86_VENDOR_INTEL, 0x06A0 },
- { X86_VENDOR_INTEL, 0x06A1 },
- { X86_VENDOR_INTEL, 0x06A4 },
+ { X86_VENDOR_INTEL, 0x0681 }, /* PIII, cA2/cA2c/A2/BA2/PA2/MA2 */
+ { X86_VENDOR_INTEL, 0x0683 }, /* PIII/Celeron, cB0/cB0c/B0/BB0/PB0/MB0*/
+ { X86_VENDOR_INTEL, 0x0686 }, /* PIII/Celeron, cC0/C0/BC0/PC0/MC0 */
+ { X86_VENDOR_INTEL, 0x068a }, /* PIII/Celeron, cD0/D0/BD0/PD0 */
+
+ { X86_VENDOR_INTEL, 0x06a0 }, /* PIII, A0 */
+ { X86_VENDOR_INTEL, 0x06a1 }, /* PIII, A1 */
+ { X86_VENDOR_INTEL, 0x06a4 }, /* PIII, B0 */
{ 0, 0 },
};