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| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-12-03 22:04:55 +0100 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2020-12-04 11:00:45 +0000 |
| commit | d0e9538f88fa150262201debb421d45d38503061 (patch) | |
| tree | 7975bc287865669fff43f49fed5ac7425c5ba841 /src | |
| parent | 407488edaa157d3d06e0aab6578b006641ca8256 (diff) | |
| download | coreboot-d0e9538f88fa150262201debb421d45d38503061.tar.xz | |
drivers/intel/fsp2_0: FSP-T requires NO_CBFS_MCACHE
When FSP-T is used, the first thing done in postcar is to call FSP-M
to tear down CAR. This is done before cbmem is initialized, which
means CBFS_MCACHE is not accessible, which results in FSP-M not being
found, failing the boot.
TESTED: ocp/deltalake boots again.
Change-Id: Icb41b802c636d42b0ebeb3e3850551813accda91
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48282
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/drivers/intel/fsp2_0/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 03b9c2b98e..96ae282522 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -113,6 +113,7 @@ config FSP_S_FILE config FSP_CAR bool default n + select NO_CBFS_MCACHE help Use FSP APIs to initialize & Tear Down the Cache-As-Ram |