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authorVarshit Pandya <varshit.b.pandya@intel.com>2020-11-12 13:13:05 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-12-01 07:59:23 +0000
commite9695f0d70c599ceaf249067e8e3aed716f8a464 (patch)
tree38b7fcd1ef3711c61cd44a433dbc2cb8b9961d4a /src
parent1ce5f5827d95e6fe00e9a3681f3679e44cbb7d47 (diff)
downloadcoreboot-e9695f0d70c599ceaf249067e8e3aed716f8a464.tar.xz
mb/intel/adlrvp: Configure Camera related GPIO as per schematics
Configure RST and PWR_EN signals for both WFC and UFC Signed-off-by: Varshit Pandya <varshit.b.pandya@intel.com> Change-Id: Ie416da373756b1c73472b8572f87930965a3d6ec Reviewed-on: https://review.coreboot.org/c/coreboot/+/47496 Reviewed-by: V Sowmya <v.sowmya@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/adlrvp/gpio.c19
1 files changed, 8 insertions, 11 deletions
diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c
index 9b94cec4bd..8ff6fcdbe3 100644
--- a/src/mainboard/intel/adlrvp/gpio.c
+++ b/src/mainboard/intel/adlrvp/gpio.c
@@ -26,8 +26,6 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO(GPP_B2, 1, PLTRST),
/* M.2 SSD_2 Reset */
PAD_CFG_GPO(GPP_H0, 1, PLTRST),
- /* CAM1-IRQ */
- PAD_CFG_GPO(GPP_B23, 1, PLTRST),
/* CAM_STROBE */
PAD_CFG_GPO(GPP_B18, 0, PLTRST),
/* Audio Codec INT N */
@@ -77,6 +75,14 @@ static const struct pad_config gpio_table[] = {
/* SRCCLK_OEB6 */
PAD_CFG_GPO(GPP_E5, 0, PLTRST),
+ /* CAM1_RST */
+ PAD_CFG_GPO(GPP_R5, 1, PLTRST),
+ /* CAM2_RST */
+ PAD_CFG_GPO(GPP_E15, 1, PLTRST),
+ /* CAM1_PWR_EN */
+ PAD_CFG_GPO(GPP_B23, 1, PLTRST),
+ /* CAM2_PWR_EN */
+ PAD_CFG_GPO(GPP_E16, 1, PLTRST),
/* M.2_SSD_PDET_R */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* THC0 SPI1 CLK */
@@ -186,15 +192,6 @@ static const struct pad_config gpio_table[] = {
/* I2S0_RXD */
PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2),
- /* I2S1_SCLK */
- PAD_CFG_NF(GPP_A23, NONE, DEEP, NF1),
- /* I2S1_SFRM */
- PAD_CFG_NF(GPP_R5, NONE, DEEP, NF2),
- /* I2S1_TXD */
- PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2),
- /* I2S1_RXD */
- PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2),
-
/* I2S2_SCLK */
PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),
/* I2S2_SFRM */